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Re: [Qemu-devel] [PATCH v2 02/10] machine: introduce MachineClass.possib
From: |
Eduardo Habkost |
Subject: |
Re: [Qemu-devel] [PATCH v2 02/10] machine: introduce MachineClass.possible_cpu_arch_ids() hook |
Date: |
Fri, 12 Feb 2016 16:33:28 -0200 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On Fri, Feb 05, 2016 at 07:06:58PM +0100, Igor Mammedov wrote:
> on x86 currently range 0..max_cpus is used to generate
> architecture-dependent CPU ID (APIC Id) for each present
> and possible CPUs. However architecture-dependent CPU IDs
> list could be sparse and code that needs to enumerate
> all IDs (ACPI) ended up doing guess work enumerating all
> possible and impossible IDs up to
> apic_id_limit = x86_cpu_apic_id_from_index(max_cpus).
>
> That leads to creation of MADT entries and Processor
> objects in ACPI tables for not possible CPUs.
> Fix it by allowing board specify a concrete list of
> CPU IDs accourding its own rules (which for x86 depends
> on topology). So that code that needs this list could
> request it from board instead of trying to figure out
> what IDs are correct on its own.
>
> Signed-off-by: Igor Mammedov <address@hidden>
> ---
> hw/i386/pc.c | 16 ++++++++++++++++
> include/hw/boards.h | 18 ++++++++++++++++++
> 2 files changed, 34 insertions(+)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 9227bde..548ec64 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -1931,6 +1931,21 @@ static unsigned pc_cpu_index_to_socket_id(unsigned
> cpu_index)
> return topo.pkg_id;
> }
>
> +static GArray *pc_possible_cpu_arch_ids(void)
> +{
> + int i;
> + GArray *list = g_array_new(FALSE, FALSE, sizeof(CPUArchId));
> +
> + for (i = 0; i < max_cpus; i++) {
> + CPUArchId val;
> +
> + val.arch_id = x86_cpu_apic_id_from_index(i);
> + val.cpu = qemu_get_cpu_by_arch_id(val.arch_id);
> + g_array_append_val(list, val);
> + }
> + return list;
> +}
You claim this version is linear, but I don't see any change from
v1, except for a whitespace change.
qemu_get_cpu_by_arch_id() is O(smp_cpus). This calls
qemu_get_cpu_by_arch_id() max_cpus times, so this is
O(max_cpus*smp_cpus).
--
Eduardo
- [Qemu-devel] [PATCH v2 00/10] pc: do not create invalid MADT.LAPIC/Processor entries, Igor Mammedov, 2016/02/05
- [Qemu-devel] [PATCH v2 02/10] machine: introduce MachineClass.possible_cpu_arch_ids() hook, Igor Mammedov, 2016/02/05
- Re: [Qemu-devel] [PATCH v2 02/10] machine: introduce MachineClass.possible_cpu_arch_ids() hook,
Eduardo Habkost <=
- [Qemu-devel] [PATCH v2 01/10] cpu: rename cpu_exists() to qemu_get_cpu_by_arch_id(), Igor Mammedov, 2016/02/05
- [Qemu-devel] [PATCH v2 03/10] pc: init pcms->apic_id_limit once and use it throughout pc.c, Igor Mammedov, 2016/02/05
- [Qemu-devel] [PATCH v2 04/10] pc: acpi: cleanup qdev_get_machine() calls, Igor Mammedov, 2016/02/05
- [Qemu-devel] [PATCH v2 05/10] pc: acpi: SRAT: create only valid processor lapic entries, Igor Mammedov, 2016/02/05
- [Qemu-devel] [PATCH v2 06/10] pc: acpi: create Processor and Notify objects only for valid lapics, Igor Mammedov, 2016/02/05
- [Qemu-devel] [PATCH v2 07/10] pc: acpi: create MADT.lapic entries only for valid lapics, Igor Mammedov, 2016/02/05
- [Qemu-devel] [PATCH v2 10/10] pc: acpi: remove NOP assignment, Igor Mammedov, 2016/02/05
- [Qemu-devel] [PATCH v2 08/10] pc: acpi: move cpu->found_cpus bitmap to build_processor_devices(), Igor Mammedov, 2016/02/05
- [Qemu-devel] [PATCH v2 09/10] pc: acpi: clarify why possible LAPIC entries must be present in MADT, Igor Mammedov, 2016/02/05