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[Qemu-devel] [PULL 17/20] sdhci: Revert "add optional quirk property to
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 17/20] sdhci: Revert "add optional quirk property to disable card insertion/removal interrupts" |
Date: |
Fri, 26 Feb 2016 15:20:22 +0000 |
From: Andrew Baumann <address@hidden>
This reverts commit 723697551a7e926abe7d3c7f2966012b8075143d.
This change was poorly tested on my part. It squelched card insertion
interrupts on reset, but that was not necessary because sdhci_reset()
clears all the registers (via the call to memset), so the subsequent
sdhci_insert_eject_cb() call never sees the card insert interrupt
enabled. However, not calling the insert_eject_cb results in prnsts
remaining 0, when it actually needs to be updated to indicate card
presence and R/O status.
Signed-off-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/sd/sdhci.c | 9 +++------
include/hw/sd/sdhci.h | 1 -
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 73e7c87..f175b30 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -198,11 +198,9 @@ static void sdhci_reset(SDHCIState *s)
* initialization */
memset(&s->sdmasysad, 0, (uintptr_t)&s->capareg -
(uintptr_t)&s->sdmasysad);
- if (!s->noeject_quirk) {
- /* Reset other state based on current card insertion/readonly status */
- sdhci_set_inserted(dev, sdbus_get_inserted(&s->sdbus));
- sdhci_set_readonly(dev, sdbus_get_readonly(&s->sdbus));
- }
+ /* Reset other state based on current card insertion/readonly status */
+ sdhci_set_inserted(dev, sdbus_get_inserted(&s->sdbus));
+ sdhci_set_readonly(dev, sdbus_get_readonly(&s->sdbus));
s->data_count = 0;
s->stopped_state = sdhc_not_stopped;
@@ -1275,7 +1273,6 @@ static Property sdhci_sysbus_properties[] = {
DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
SDHC_CAPAB_REG_DEFAULT),
DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
- DEFINE_PROP_BOOL("noeject-quirk", SDHCIState, noeject_quirk, false),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index 607a83e..4816516 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -76,7 +76,6 @@ typedef struct SDHCIState {
uint32_t buf_maxsz;
uint16_t data_count; /* current element in FIFO buffer */
uint8_t stopped_state;/* Current SDHC state */
- bool noeject_quirk;/* Quirk to disable card insert/remove interrupts */
/* Buffer Data Port Register - virtual access point to R and W buffers */
/* Software Reset Register - always reads as 0 */
/* Force Event Auto CMD12 Error Interrupt Reg - write only */
--
1.9.1
- [Qemu-devel] [PULL 00/20] target-arm queue, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 06/20] target-arm: Add comment about not implementing NSACR.RFR, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 01/20] target-arm: Give CPSR setting on 32-bit exception return its own helper, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 03/20] target-arm: Raw CPSR writes should skip checks and bank switching, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 10/20] target-arm: Make mode switches from Hyp via CPS and MRS illegal, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 05/20] target-arm: In cpsr_write() ignore mode switches from User mode, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 08/20] target-arm: Forbid mode switch to Mon from Secure EL1, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 02/20] target-arm: Add write_type argument to cpsr_write(), Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 17/20] sdhci: Revert "add optional quirk property to disable card insertion/removal interrupts",
Peter Maydell <=
- [Qemu-devel] [PULL 12/20] target-arm: Fix handling of SDCR for 32-bit code, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 04/20] linux-user: Use restrictive mask when calling cpsr_write(), Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 11/20] target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 20/20] target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 13/20] target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 14/20] ARM: PL061: Checking register r/w accesses to reserved area, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 07/20] target-arm: Add Hyp mode checks to bad_mode_switch(), Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 15/20] raspi: fix SD card with recent sdhci changes, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 09/20] target-arm: In v8, make illegal AArch32 mode changes set PSTATE.IL, Peter Maydell, 2016/02/26
- [Qemu-devel] [PULL 16/20] MAINTAINERS: Add some missing ARM related header files, Peter Maydell, 2016/02/26