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Re: [Qemu-devel] [PATCH 4/4] target-arm: Avoid unnecessary TLB flush on
Re: [Qemu-devel] [PATCH 4/4] target-arm: Avoid unnecessary TLB flush on TCR_EL2 writes
Mon, 4 Apr 2016 16:01:09 +0100
On 4 April 2016 at 15:58, Sergey Fedorov <address@hidden> wrote:
> On 31/03/16 17:49, Peter Maydell wrote:
>> The TCR_EL2 regdef was incorrectly using the vmsa_tcr_el1_write
>> function for writes. Since TCR_EL2 doesn't have the A1 bit that
>> TCR_EL1 does, we don't need to do a tlb_flush() when it is written.
>> Remove the unnecessary .writefn and also the harmless but unneeded
>> .raw_writefn and .resetfn definitions.
> How about TCR_EL3 which doesn't have A1 bit as well?
Yes, that should have this change too I think.
I'll put patches 1-3 into target-arm.next, and respin this one
(which then probably doesn't need to go into 2.6.)