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Re: [Qemu-devel] Any progress with the Cortex-M4 emulation?

From: Peter Maydell
Subject: Re: [Qemu-devel] Any progress with the Cortex-M4 emulation?
Date: Wed, 6 Apr 2016 13:02:05 +0100

On 5 April 2016 at 22:57, Liviu Ionescu <address@hidden> wrote:
> (I know that from time to time this question pops up, but) is
> there anyone working or planning to work on the M4 emulation?

Not that I'm aware of; Michael Davidsaver had some patches for
improving the v7M interrupt/exception emulation, but I don't
think I've seen anything for the FPU side of things.

> If not, I might give it a try, perhaps it is not as mission
> impossible as it looks like. Except the lazy processing of
> exception save/restore which must be implemented, is
> everything else related to the instruction set already in?
> (because I would not venture into this territory).

It's not impossible, it's merely that it's more work than
just flipping a feature bit. I haven't checked but I expect
that the actual instruction emulation should all be there.
Lazy-restore will be the most complicated part. My initial
thoughts would be that you'd want to do it by treating
"lazy state preservation active" as similar to "fp disabled",
so it's a TB flag that causes an exception to be taken
(in this case a qemu internal one that we handle by doing
the necessary state-save and then resuming the instruction).

-- PMM

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