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Re: [Qemu-devel] Any progress with the Cortex-M4 emulation?

From: Peter Maydell
Subject: Re: [Qemu-devel] Any progress with the Cortex-M4 emulation?
Date: Wed, 6 Apr 2016 15:42:05 +0100

On 6 April 2016 at 13:52, Liviu Ionescu <address@hidden> wrote:
>> On 06 Apr 2016, at 15:02, Peter Maydell <address@hidden> wrote:
>> On 5 April 2016 at 22:57, Liviu Ionescu <address@hidden> wrote:
>>> (I know that from time to time this question pops up, but) is
>>> there anyone working or planning to work on the M4 emulation?
>> Not that I'm aware of; Michael Davidsaver had some patches for
>> improving the v7M interrupt/exception emulation,
> I also have on my TODO list to implement the SCB registers used
> during exception processing (MMFAR, BFAR, CFSR); I checked and
> in version 2.5.1 apparently they are still not implemented.

Those I think are covered by Michael's patchset.

> but before addressing the M4, I decided to restructure the
> rest of the Cortex-M system code, that now is all together
> in the NVIC object.
> the current plan is to create a new object (probably called
> SCS - System Control Space), that will cover the 0xE000E000
>-0xE000EFFF area and inside it to map SysTick, NVIC, SCB, MPU,
> Debug and FPU as separate objects.

This will clash very badly with Michael's in-flight
patchset. I think it would be much better to get that
complete and upstream first, because otherwise you'll
probably end up having to redo a lot of work.

-- PMM

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