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Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with
From: |
Emilio G. Cota |
Subject: |
Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash |
Date: |
Wed, 6 Apr 2016 13:32:55 -0400 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On Wed, Apr 06, 2016 at 08:06:57 +0200, Laurent Desnogues wrote:
> On Tue, Apr 5, 2016 at 7:19 PM, Richard Henderson <address@hidden> wrote:
> > On 04/05/2016 09:33 AM, Laurent Desnogues wrote:
> >> The 'flags' field is 64-bit. You're thinking of cflags, I guess.
> >
> > Well that's silly. Since it's filled in via
> >
> > static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc,
> > target_ulong *cs_base, int *flags)
> >
> > and passed back in to generate code with
> >
> > TranslationBlock *tb_gen_code(CPUState *cpu,
> > target_ulong pc, target_ulong cs_base, int
> > flags,
> > int cflags);
> >
> > So while TranslationBlock stores "uint64_t", the producer and consumer see
> > "int".
>
> I agree. I guess TranslationBlock should be fixed to use uint32_t
> (note several functions have to be changed from using int to uint32_t
> or aarch64-softmmu will fail).
Can you please elaborate on this?
FWIW aarch64-softmmu boots OK for me with the patch below. I'm booting
it as per the instructions in
http://www.bennee.com/~alex/blog/2014/05/09/running-linux-in-qemus-aarch64-system-emulation-mode/
Thanks,
Emilio
commit e70474788fa37a85df21e1c63101a879103758f5
Author: Emilio G. Cota <address@hidden>
Date: Tue Apr 5 13:55:16 2016 -0400
tb: consistently use 'int' type for tb->flags
Reported-by: Richard Henderson <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
diff --git a/cpu-exec.c b/cpu-exec.c
index bbfcbfb..5abbf57 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -220,7 +220,7 @@ static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
static TranslationBlock *tb_find_physical(CPUState *cpu,
target_ulong pc,
target_ulong cs_base,
- uint64_t flags)
+ int flags)
{
CPUArchState *env = (CPUArchState *)cpu->env_ptr;
TranslationBlock *tb, **ptb1;
@@ -271,7 +271,7 @@ static TranslationBlock *tb_find_physical(CPUState *cpu,
static TranslationBlock *tb_find_slow(CPUState *cpu,
target_ulong pc,
target_ulong cs_base,
- uint64_t flags)
+ int flags)
{
TranslationBlock *tb;
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 7362095..277e6f1 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -235,7 +235,7 @@ static inline void tlb_flush_by_mmuidx(CPUState *cpu, ...)
struct TranslationBlock {
target_ulong pc; /* simulated PC corresponding to this block (EIP + CS
base) */
target_ulong cs_base; /* CS base for this block */
- uint64_t flags; /* flags defining in which context the code was generated
*/
+ int flags; /* flags defining in which context the code was generated */
uint16_t size; /* size of target code for this block (1 <=
size <= TARGET_PAGE_SIZE) */
uint16_t icount;
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 1a1214d..4024ad4 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8178,7 +8178,7 @@ void gen_intermediate_code(CPUX86State *env,
TranslationBlock *tb)
CPUState *cs = CPU(cpu);
DisasContext dc1, *dc = &dc1;
target_ulong pc_ptr;
- uint64_t flags;
+ int flags;
target_ulong pc_start;
target_ulong cs_base;
int num_insns;
diff --git a/translate-all.c b/translate-all.c
index 8329ea6..27b4d57 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1593,7 +1593,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
TranslationBlock *tb;
uint32_t n, cflags;
target_ulong pc, cs_base;
- uint64_t flags;
+ int flags;
tb = tb_find_pc(retaddr);
if (!tb) {
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, (continued)
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Richard Henderson, 2016/04/05
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Emilio G. Cota, 2016/04/05
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Paolo Bonzini, 2016/04/06
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Emilio G. Cota, 2016/04/06
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Paolo Bonzini, 2016/04/06
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Richard Henderson, 2016/04/06
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Emilio G. Cota, 2016/04/06
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Laurent Desnogues, 2016/04/05
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Richard Henderson, 2016/04/05
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Laurent Desnogues, 2016/04/06
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash,
Emilio G. Cota <=
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Richard Henderson, 2016/04/06
- Re: [Qemu-devel] [PATCH 07/10] tb hash: hash phys_pc, pc, and flags with xxhash, Laurent Desnogues, 2016/04/07
Re: [Qemu-devel] [PATCH 00/10] tb hash improvements, Alex Bennée, 2016/04/05
Re: [Qemu-devel] [PATCH 00/10] tb hash improvements, Paolo Bonzini, 2016/04/05