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Re: [Qemu-devel] Any progress with the Cortex-M4 emulation?

From: Liviu Ionescu
Subject: Re: [Qemu-devel] Any progress with the Cortex-M4 emulation?
Date: Thu, 7 Apr 2016 00:54:21 +0300

> On 06 Apr 2016, at 17:42, Peter Maydell <address@hidden> wrote:
> On 6 April 2016 at 13:52, Liviu Ionescu <address@hidden> wrote:
>> I also have on my TODO list to implement the SCB registers used
>> during exception processing (MMFAR, BFAR, CFSR); I checked and
>> in version 2.5.1 apparently they are still not implemented.
> Those I think are covered by Michael's patchset.

I updated my git and browsed the log records, the only commits of Michael were 
from Mov 3, and apparently did not include this functionality.

> This will clash very badly with Michael's in-flight
> patchset.

you mean Michael's code is not yet in the master branch?

> I think it would be much better to get that
> complete and upstream first, because otherwise you'll
> probably end up having to redo a lot of work.

my intent is to isolate the Cortex-M code from the existing ARM implementation, 
practically it should be a fresh start of the Cortex-M code, with a NVIC that 
no longer inherits from GIC.

if you plan to further maintain the existing code, fain, but for me it is a bit 
too messy and I cannot rely on it, I need a clean implementation of the system 
peripherals, with properly processed exceptions.

if Michael code is not in, when do you think it will be, so I can make a 
decision to either continue to patch the existing code or to redo the system 



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