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[Qemu-devel] [PATCH v2 00/13] IOMMU: Enable interrupt remapping for Inte

From: Peter Xu
Subject: [Qemu-devel] [PATCH v2 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU
Date: Mon, 11 Apr 2016 17:19:10 +0800

v2 changes:
- patch 1
  - rename "int_remap" to "intr" in several places [Marcel]
  - remove "Intel" specific words in desc or commit message, prepare
    itself with further AMD support [Marcel]
  - avoid using object_property_get_bool() [Marcel]
- patch 5
  - use PCI bus number 0xff rather than 0xf0 for the IOAPIC scope
    definition. (please let me know if anyone knows how I can avoid
        user using PCI bus number 0xff... TIA)
- patch 11
  - fix comments [Marcel]
- all
  - remove intr_supported variable [Marcel]

This patchset provide very basic functionalities for interrupt
remapping (IR) support of the emulated Intel IOMMU device.

By default, IR is disabled to be better compatible with current
QEMU. To enable IR, we can using the following command to boot a
IR-supported VM with basic network (still do not support kvm-ioapic,
so we need to specify kernel-irqchip=off here):

$ qemu-system-x86_64 -M q35,iommu=on,intr=on,kernel-irqchip=off \
     -enable-kvm -m 1024 -s \
     -monitor telnet::3333,server,nowait \
     -netdev user,id=user.0,hostfwd=tcp::5555-:22 \
     -device virtio-net-pci,netdev=user.0 \

When guest boots, we can verify whether IR enabled by grepping the
dmesg like:

address@hidden ~]# journalctl -k | grep "DMAR-IR"
Feb 19 11:21:23 localhost.localdomain kernel: DMAR-IR: IOAPIC id 0 under DRHD 
base  0xfed90000 IOMMU 0
Feb 19 11:21:23 localhost.localdomain kernel: DMAR-IR: Enabled IRQ remapping in 
xapic mode

Currently only two devices are supported:

- Emulated IOAPIC device
- PCI Devices

TODO List:

- kvm-ioapic support
- vhost support
- pass through device support
- EIM support
- IR fault reporting
- source-id validation for IRTE
- IRTE cache and better queued invalidation
- migration support (for IOMMU as general?)
- more?

Peter Xu (13):
  q35: add "int-remap" flag to enable intr
  acpi: enable INTR for DMAR report structure
  intel_iommu: allow queued invalidation for IR
  intel_iommu: set IR bit for ECAP register
  acpi: add DMAR scope definition for root IOAPIC
  intel_iommu: define interrupt remap table addr register
  intel_iommu: handle interrupt remap enable
  intel_iommu: define several structs for IOMMU IR
  intel_iommu: provide helper function vtd_get_iommu
  ioapic-common: add iommu for IOAPICCommonState
  intel_iommu: add IR translation faults defines
  intel_iommu: ioapic: IR support for emulated IOAPIC
  intel_iommu: Add support for PCI MSI remap

 hw/core/machine.c                 |  21 ++
 hw/i386/acpi-build.c              |  42 ++--
 hw/i386/intel_iommu.c             | 400 +++++++++++++++++++++++++++++++++++++-
 hw/i386/intel_iommu_internal.h    |  23 +++
 hw/intc/ioapic.c                  |  36 +++-
 hw/intc/ioapic_common.c           |   2 +
 include/hw/acpi/acpi-defs.h       |  15 ++
 include/hw/boards.h               |   1 +
 include/hw/i386/intel_iommu.h     | 120 ++++++++++++
 include/hw/i386/ioapic_internal.h |   3 +
 include/hw/pci/msi.h              |   4 +
 11 files changed, 647 insertions(+), 20 deletions(-)


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