[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v5 00/18] IOMMU: Enable interrupt remapping for
Re: [Qemu-devel] [PATCH v5 00/18] IOMMU: Enable interrupt remapping for Intel IOMMU
Thu, 28 Apr 2016 11:32:19 +0200
Mozilla/5.0 (X11; U; Linux i686 (x86_64); de; rv:18.104.22.168) Gecko/20080226 SUSE/22.214.171.124-1.1 Thunderbird/126.96.36.199 Mnenhy/0.7.5.666
On 2016-04-28 11:18, Peter Xu wrote:
> On Thu, Apr 28, 2016 at 09:19:28AM +0200, Jan Kiszka wrote:
>> On 2016-04-28 09:05, Peter Xu wrote:
>>> v5 changes:
>>> - patch 10: add vector checking for IOAPIC interrupts (this may help
>>> debug in the future, will only generate warning if specify
>>> - patch 13: replace error_report() with a trace. [Jan]
>>> - patch 14: rename parameter "intr" to "intremap", to be aligned
>>> with kernel parameter [Jan]
>>> - patch 15: fix comments for vtd_iec_notify_fn
>>> - patch 17 & 18 (added): fix issue when IR enabled with devices
>>> using level-triggered interrupts, like e1000. Adding it to the end
>>> of series, since this issue never happen without IR.
>>> Patch 17 adds read-only check for IOAPIC entries.
>>> Patch 18 clears remote IRR bit when entry configured as
>> IIUC, your series does not address irqfd yet, only by chance if the
>> target is an IOAPIC pin for which you set up routes now. Correct?
> Ah, yes, vhost and vfio should be in the notifier list as well. I
> just missed that. :(
> If not consider the IEC invalidation, the series should work for
> irqfd, right?
Hmm, yeah - you are hooking to the route update path and translate what
the kernel will get.
>> Instead of fiddling with irq routes for the IOAPIC - where we don't need
>> it -, I would suggest to do the following: Send IOAPIC events via
>> kvm_irqchip_send_msi to the kernel. Only irqfd users (vhost, vfio)
>> should use the pattern you are now applying to the IOAPIC: establish
>> static routes as an irqfd is set up, and that route should be translated
>> by the iommu first, register an IEC notifier to update any affected
>> route when the iommu translation changes.
> Yes, maybe that's the right thing to do. Or say, when split irqchip,
> IOAPIC can avoid using GSI routes any more. If with that, I should
> also remove lots of things, like: IEC notifiers for IOAPIC, and all
> things related to msi route sync-up in IOAPIC codes with KVM (so I
> suppose we will save 24 gsi route entries for KVM, which sounds
> (Ah... I think the series is keep growing...)
(Looks like I'm contributing to it, sorry ;) )
[Qemu-devel] [PATCH v5 16/18] ioapic: register VT-d IEC invalidate notifier, Peter Xu, 2016/04/28
[Qemu-devel] [PATCH v5 17/18] ioapic: keep RO bits for IOAPIC entry, Peter Xu, 2016/04/28
[Qemu-devel] [PATCH v5 18/18] ioapic: clear remote irr bit for edge-triggered interrupts, Peter Xu, 2016/04/28
Re: [Qemu-devel] [PATCH v5 00/18] IOMMU: Enable interrupt remapping for Intel IOMMU, Peter Xu, 2016/04/28
Re: [Qemu-devel] [PATCH v5 00/18] IOMMU: Enable interrupt remapping for Intel IOMMU, Jan Kiszka, 2016/04/28
[Qemu-devel] [PATCH 19/18] intel_iommu: Add support for Extended Interrupt Mode, Jan Kiszka, 2016/04/28
- Re: [Qemu-devel] [PATCH v5 15/18] intel_iommu: introduce IEC notifiers, (continued)