[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 01/12] ppc: Remove MMU_MODEn_SUFFIX definitions
From: |
Cédric Le Goater |
Subject: |
[Qemu-devel] [PATCH 01/12] ppc: Remove MMU_MODEn_SUFFIX definitions |
Date: |
Tue, 3 May 2016 18:03:23 +0200 |
From: Benjamin Herrenschmidt <address@hidden>
We don't use the resulting accessors and this gets in the way of
the split I/D TLB work.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
---
target-ppc/cpu.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 5282533b3858..4c0dc02e86d5 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1303,9 +1303,6 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t
val);
#define cpu_list ppc_cpu_list
/* MMU modes definitions */
-#define MMU_MODE0_SUFFIX _user
-#define MMU_MODE1_SUFFIX _kernel
-#define MMU_MODE2_SUFFIX _hypv
#define MMU_USER_IDX 0
static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch)
{
--
2.1.4
- [Qemu-devel] [PATCH 08/12] ppc: tlbie, tlbia and tlbisync are HV only, (continued)
[Qemu-devel] [PATCH 01/12] ppc: Remove MMU_MODEn_SUFFIX definitions,
Cédric Le Goater <=
[Qemu-devel] [PATCH 11/12] ppc: Get out of emulation on SMT "OR" ops, Cédric Le Goater, 2016/05/03
[Qemu-devel] [PATCH 12/12] ppc: Add PPC_64H instruction flag to POWER7 and POWER8, Cédric Le Goater, 2016/05/03
[Qemu-devel] [PATCH 04/12] ppc: Add a bunch of hypervisor SPRs to Book3s, Cédric Le Goater, 2016/05/03
[Qemu-devel] [PATCH 09/12] ppc: Change 'invalid' bit mask of tlbiel and tlbie, Cédric Le Goater, 2016/05/03
[Qemu-devel] [PATCH 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts, Cédric Le Goater, 2016/05/03
Re: [Qemu-devel] [PATCH 00/12] ppc: preparing pnv landing (round 2), David Gibson, 2016/05/03
Re: [Qemu-devel] [Qemu-ppc] [PATCH 00/12] ppc: preparing pnv landing (round 2), David Gibson, 2016/05/26