[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 39/52] target-m68k: movem
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH 39/52] target-m68k: movem |
Date: |
Wed, 4 May 2016 23:08:42 +0200 |
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 51 ++++++++++++++++++++++++++++++++++---------------
1 file changed, 36 insertions(+), 15 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9a38235..53c3c41 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1714,6 +1714,8 @@ DISAS_INSN(movem)
TCGv reg;
TCGv tmp;
int is_load;
+ int opsize;
+ int32_t incr;
mask = read_im16(env, s);
tmp = gen_lea(env, s, insn, OS_LONG);
@@ -1724,21 +1726,40 @@ DISAS_INSN(movem)
addr = tcg_temp_new();
tcg_gen_mov_i32(addr, tmp);
is_load = ((insn & 0x0400) != 0);
- for (i = 0; i < 16; i++, mask >>= 1) {
- if (mask & 1) {
- if (i < 8)
- reg = DREG(i, 0);
- else
- reg = AREG(i, 0);
- if (is_load) {
- tmp = gen_load(s, OS_LONG, addr, 0);
- tcg_gen_mov_i32(reg, tmp);
- } else {
- gen_store(s, OS_LONG, addr, reg);
- }
- if (mask != 1)
- tcg_gen_addi_i32(addr, addr, 4);
- }
+ opsize = (insn & 0x40) != 0 ? OS_LONG : OS_WORD;
+ incr = opsize_bytes(opsize);
+ if (!is_load && (insn & 070) == 040) {
+ for (i = 15; i >= 0; i--, mask >>= 1) {
+ if (mask & 1) {
+ if (i < 8)
+ reg = DREG(i, 0);
+ else
+ reg = AREG(i, 0);
+ gen_store(s, opsize, addr, reg);
+ if (mask != 1)
+ tcg_gen_subi_i32(addr, addr, incr);
+ }
+ }
+ tcg_gen_mov_i32(AREG(insn, 0), addr);
+ } else {
+ for (i = 0; i < 16; i++, mask >>= 1) {
+ if (mask & 1) {
+ if (i < 8)
+ reg = DREG(i, 0);
+ else
+ reg = AREG(i, 0);
+ if (is_load) {
+ tmp = gen_load(s, opsize, addr, 1);
+ tcg_gen_mov_i32(reg, tmp);
+ } else {
+ gen_store(s, opsize, addr, reg);
+ }
+ if (mask != 1 || (insn & 070) == 030)
+ tcg_gen_addi_i32(addr, addr, incr);
+ }
+ }
+ if ((insn & 070) == 030)
+ tcg_gen_mov_i32(AREG(insn, 0), addr);
}
}
--
2.5.5
- [Qemu-devel] [PATCH 34/52] target-m68k: add 64bit mull, (continued)
- [Qemu-devel] [PATCH 34/52] target-m68k: add 64bit mull, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 35/52] target-m68k: inline rotate ops, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 36/52] target-m68k: inline shift ops, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 37/52] target-m68k: add cas/cas2 ops, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 38/52] target-m68k: add linkl, Laurent Vivier, 2016/05/04
- [Qemu-devel] [PATCH 39/52] target-m68k: movem,
Laurent Vivier <=
- Re: [Qemu-devel] [PATCH 33/52] target-m68k: inline divu/divs, Richard Henderson, 2016/05/06
- [Qemu-devel] [PATCH 40/52] target-m68k: add exg ops, Laurent Vivier, 2016/05/04