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[Qemu-devel] [PATCH v6 06/26] intel_iommu: handle interrupt remap enable
From: |
Peter Xu |
Subject: |
[Qemu-devel] [PATCH v6 06/26] intel_iommu: handle interrupt remap enable |
Date: |
Thu, 5 May 2016 11:25:41 +0800 |
Handle writting to IRE bit in global command register.
Signed-off-by: Peter Xu <address@hidden>
---
hw/i386/intel_iommu.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 00b873c..4d14124 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1180,6 +1180,22 @@ static void vtd_handle_gcmd_te(IntelIOMMUState *s, bool
en)
}
}
+/* Handle Interrupt Remap Enable/Disable */
+static void vtd_handle_gcmd_ire(IntelIOMMUState *s, bool en)
+{
+ VTD_DPRINTF(CSR, "Interrupt Remap Enable %s", (en ? "on" : "off"));
+
+ if (en) {
+ s->intr_enabled = true;
+ /* Ok - report back to driver */
+ vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_IRES);
+ } else {
+ s->intr_enabled = false;
+ /* Ok - report back to driver */
+ vtd_set_clear_mask_long(s, DMAR_GSTS_REG, VTD_GSTS_IRES, 0);
+ }
+}
+
/* Handle write to Global Command Register */
static void vtd_handle_gcmd_write(IntelIOMMUState *s)
{
@@ -1204,6 +1220,10 @@ static void vtd_handle_gcmd_write(IntelIOMMUState *s)
/* Set/update the interrupt remapping root-table pointer */
vtd_handle_gcmd_sirtp(s);
}
+ if (changed & VTD_GCMD_IRE) {
+ /* Interrupt remap enable/disable */
+ vtd_handle_gcmd_ire(s, val & VTD_GCMD_IRE);
+ }
}
/* Handle write to Context Command Register */
--
2.4.11
- [Qemu-devel] [PATCH v6 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 01/26] acpi: enable INTR for DMAR report structure, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 02/26] intel_iommu: allow queued invalidation for IR, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 03/26] intel_iommu: set IR bit for ECAP register, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 04/26] acpi: add DMAR scope definition for root IOAPIC, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 05/26] intel_iommu: define interrupt remap table addr register, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 06/26] intel_iommu: handle interrupt remap enable,
Peter Xu <=
- [Qemu-devel] [PATCH v6 07/26] intel_iommu: define several structs for IOMMU IR, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 08/26] intel_iommu: provide helper function vtd_get_iommu, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 09/26] intel_iommu: add IR translation faults defines, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 10/26] intel_iommu: Add support for PCI MSI remap, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 11/26] q35: ioapic: add support for emulated IOAPIC IR, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 12/26] ioapic: introduce ioapic_entry_parse() helper, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 13/26] intel_iommu: add support for split irqchip, Peter Xu, 2016/05/04
- [Qemu-devel] [PATCH v6 14/26] q35: add "intremap" parameter to enable IR, Peter Xu, 2016/05/04