[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 07/23] hw/intc/arm_gicv3: Move irq lines into GICv3C
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 07/23] hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure |
Date: |
Mon, 9 May 2016 18:29:33 +0100 |
Move the GICv3 parent_irq and parent_fiq pointers into the
GICv3CPUState structure rather than giving them their own array.
This will make it easy to assert the IRQ and FIQ lines for a
particular CPU interface without having to know or calculate
the CPU index for the GICv3CPUState we are working on.
Signed-off-by: Peter Maydell <address@hidden>
---
hw/intc/arm_gicv3_common.c | 7 ++-----
include/hw/intc/arm_gicv3_common.h | 5 ++---
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 9ee4412..7a7fc9f 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -72,14 +72,11 @@ void gicv3_init_irqs_and_mmio(GICv3State *s,
qemu_irq_handler handler,
i = s->num_irq - GIC_INTERNAL + GIC_INTERNAL * s->num_cpu;
qdev_init_gpio_in(DEVICE(s), handler, i);
- s->parent_irq = g_malloc(s->num_cpu * sizeof(qemu_irq));
- s->parent_fiq = g_malloc(s->num_cpu * sizeof(qemu_irq));
-
for (i = 0; i < s->num_cpu; i++) {
- sysbus_init_irq(sbd, &s->parent_irq[i]);
+ sysbus_init_irq(sbd, &s->cpu[i].parent_irq);
}
for (i = 0; i < s->num_cpu; i++) {
- sysbus_init_irq(sbd, &s->parent_fiq[i]);
+ sysbus_init_irq(sbd, &s->cpu[i].parent_fiq);
}
memory_region_init_io(&s->iomem_dist, OBJECT(s), ops, s,
diff --git a/include/hw/intc/arm_gicv3_common.h
b/include/hw/intc/arm_gicv3_common.h
index 38d9741..f65b4a3 100644
--- a/include/hw/intc/arm_gicv3_common.h
+++ b/include/hw/intc/arm_gicv3_common.h
@@ -131,6 +131,8 @@ typedef struct GICv3CPUState GICv3CPUState;
struct GICv3CPUState {
GICv3State *gic;
CPUState *cpu;
+ qemu_irq parent_irq;
+ qemu_irq parent_fiq;
/* Redistributor */
uint32_t level; /* Current IRQ level */
@@ -165,9 +167,6 @@ struct GICv3State {
SysBusDevice parent_obj;
/*< public >*/
- qemu_irq *parent_irq;
- qemu_irq *parent_fiq;
-
MemoryRegion iomem_dist; /* Distributor */
MemoryRegion iomem_redist; /* Redistributors */
--
1.9.1
- [Qemu-devel] [PATCH 00/23] GICv3 emulation, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 21/23] hw/intc/arm_gicv3: Work around Linux assuming interrupts are group 1, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 22/23] NOT-FOR-UPSTREAM: kernel: Add definitions for GICv3 attributes, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 20/23] target-arm/monitor.c: Advertise emulated GICv3 in capabilities, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 16/23] hw/intc/arm_gicv3: Implement gicv3_cpuif_update(), Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 19/23] target-arm/machine.c: Allow user to request GICv3 emulation, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 02/23] bitops.h: Implement half-shuffle and half-unshuffle ops, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 05/23] target-arm: Add mp-affinity property for ARM CPU class, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 04/23] target-arm: Provide hook to tell GICv3 about changes of security state, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 18/23] hw/intc/arm_gicv3: Add IRQ handling CPU interface registers, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 07/23] hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure,
Peter Maydell <=
- [Qemu-devel] [PATCH 10/23] hw/intc/arm_gicv3: Implement functions to identify next pending irq, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 12/23] hw/intc/arm_gicv3: Implement GICv3 redistributor registers, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 15/23] hw/intc/arm_gicv3: Implement GICv3 CPU interface registers, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 23/23] RFC: hw/intc/arm_gicv3_kvm: Implement get/put functions, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 13/23] hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 01/23] migration: Define VMSTATE_UINT64_2DARRAY, Peter Maydell, 2016/05/09
- [Qemu-devel] [PATCH 06/23] hw/intc/arm_gicv3: Add state information, Peter Maydell, 2016/05/09