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[Qemu-devel] [PATCH v6 05/13] register: QOMify
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PATCH v6 05/13] register: QOMify |
Date: |
Thu, 12 May 2016 15:46:03 -0700 |
From: Peter Crosthwaite <address@hidden>
QOMify registers as a child of TYPE_DEVICE. This allows registers to
define GPIOs.
Define an init helper that will do QOM initialisation.
Signed-off-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: KONRAD Frederic <address@hidden>
---
V5:
- Convert to using only one memory region
hw/core/register.c | 23 +++++++++++++++++++++++
include/hw/register.h | 15 +++++++++++++++
2 files changed, 38 insertions(+)
diff --git a/hw/core/register.c b/hw/core/register.c
index 25196e6..c5a2c78 100644
--- a/hw/core/register.c
+++ b/hw/core/register.c
@@ -148,6 +148,17 @@ void register_reset(RegisterInfo *reg)
register_write_val(reg, reg->access->reset);
}
+void register_init(RegisterInfo *reg)
+{
+ assert(reg);
+
+ if (!reg->data || !reg->access) {
+ return;
+ }
+
+ object_initialize((void *)reg, sizeof(*reg), TYPE_REGISTER);
+}
+
static inline void register_write_memory(void *opaque, hwaddr addr,
uint64_t value, unsigned size, bool
be)
{
@@ -219,3 +230,15 @@ uint64_t register_read_memory_le(void *opaque, hwaddr
addr, unsigned size)
{
return register_read_memory(opaque, addr, size, false);
}
+
+static const TypeInfo register_info = {
+ .name = TYPE_REGISTER,
+ .parent = TYPE_DEVICE,
+};
+
+static void register_register_types(void)
+{
+ type_register_static(®ister_info);
+}
+
+type_init(register_register_types)
diff --git a/include/hw/register.h b/include/hw/register.h
index e0aac91..eedd578 100644
--- a/include/hw/register.h
+++ b/include/hw/register.h
@@ -11,6 +11,7 @@
#ifndef REGISTER_H
#define REGISTER_H
+#include "hw/qdev-core.h"
#include "exec/memory.h"
typedef struct RegisterInfo RegisterInfo;
@@ -74,6 +75,9 @@ struct RegisterAccessInfo {
*/
struct RegisterInfo {
+ /* <private> */
+ DeviceState parent_obj;
+
/* <public> */
void *data;
int data_size;
@@ -83,6 +87,9 @@ struct RegisterInfo {
void *opaque;
};
+#define TYPE_REGISTER "qemu,register"
+#define REGISTER(obj) OBJECT_CHECK(RegisterInfo, (obj), TYPE_REGISTER)
+
/**
* This structure is used to group all of the individual registers which are
* modeled using the RegisterInfo strucutre.
@@ -132,6 +139,14 @@ uint64_t register_read(RegisterInfo *reg, const char*
prefix, bool debug);
void register_reset(RegisterInfo *reg);
/**
+ * Initialize a register. GPIO's are setup as IOs to the specified device.
+ * Fast paths for eligible registers are enabled.
+ * @reg: Register to initialize
+ */
+
+void register_init(RegisterInfo *reg);
+
+/**
* Memory API MMIO write handler that will write to a Register API register.
* _be for big endian variant and _le for little endian.
* @opaque: RegisterInfo to write to
--
2.7.4
- [Qemu-devel] [PATCH v6 00/13] data-driven device registers, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 01/13] bitops: Add MAKE_64BIT_MASK macro, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 02/13] register: Add Register API, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 03/13] register: Add Memory API glue, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 05/13] register: QOMify,
Alistair Francis <=
- [Qemu-devel] [PATCH v6 06/13] register: Add block initialise helper, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 04/13] register: Define REG and FIELD macros, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 08/13] xilinx_zynq: Connect devcfg to the Zynq machine model, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 07/13] dma: Add Xilinx Zynq devcfg device model, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 09/13] qdev: Define qdev_get_gpio_out, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 10/13] irq: Add opaque setter routine, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 11/13] register: Add GPIO API, Alistair Francis, 2016/05/12
- [Qemu-devel] [PATCH v6 12/13] misc: Introduce ZynqMP IOU SLCR, Alistair Francis, 2016/05/12