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[Qemu-devel] [PULL 04/39] tci: Make direct jump patching thread-safe
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 04/39] tci: Make direct jump patching thread-safe |
Date: |
Thu, 12 May 2016 14:13:05 -1000 |
From: Sergey Fedorov <address@hidden>
Ensure direct jump patching in TCI is atomic by:
* naturally aligning a location of direct jump address;
* using atomic_read()/atomic_set() to load/store the address.
Signed-off-by: Sergey Fedorov <address@hidden>
Signed-off-by: Sergey Fedorov <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
include/exec/exec-all.h | 2 +-
tcg/tci/tcg-target.inc.c | 2 ++
tci.c | 5 ++++-
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index c75fb3a..d49befd 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -303,7 +303,7 @@ void tb_phys_invalidate(TranslationBlock *tb,
tb_page_addr_t page_addr);
static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
{
/* patch the branch destination */
- *(uint32_t *)jmp_addr = addr - (jmp_addr + 4);
+ atomic_set((int32_t *)jmp_addr, addr - (jmp_addr + 4));
/* no need to flush icache explicitly */
}
#elif defined(_ARCH_PPC)
diff --git a/tcg/tci/tcg-target.inc.c b/tcg/tci/tcg-target.inc.c
index e2fc52a..85eeb5d 100644
--- a/tcg/tci/tcg-target.inc.c
+++ b/tcg/tci/tcg-target.inc.c
@@ -556,6 +556,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const
TCGArg *args,
if (s->tb_jmp_offset) {
/* Direct jump method. */
tcg_debug_assert(args[0] < ARRAY_SIZE(s->tb_jmp_offset));
+ /* Align for atomic patching and thread safety */
+ s->code_ptr = QEMU_ALIGN_PTR_UP(s->code_ptr, 4);
s->tb_jmp_offset[args[0]] = tcg_current_code_size(s);
tcg_out32(s, 0);
} else {
diff --git a/tci.c b/tci.c
index 82705fe..a8939e6 100644
--- a/tci.c
+++ b/tci.c
@@ -1089,7 +1089,10 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t
*tb_ptr)
goto exit;
break;
case INDEX_op_goto_tb:
- t0 = tci_read_i32(&tb_ptr);
+ /* Jump address is aligned */
+ tb_ptr = QEMU_ALIGN_PTR_UP(tb_ptr, 4);
+ t0 = atomic_read((int32_t *)tb_ptr);
+ tb_ptr += sizeof(int32_t);
tci_assert(tb_ptr == old_code_ptr + op_size);
tb_ptr += (int32_t)t0;
continue;
--
2.5.5
- [Qemu-devel] [PULL 00/39] tcg-next patch queue, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 02/39] include/qemu/osdep.h: Add a macro to check for alignment, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 03/39] include/qemu/osdep.h: Add macros for pointer alignment, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 01/39] tb: consistently use uint32_t for tb->flags, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 04/39] tci: Make direct jump patching thread-safe,
Richard Henderson <=
- [Qemu-devel] [PULL 06/39] tcg/i386: Make direct jump patching thread-safe, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 08/39] tcg/arm: Make direct jump patching thread-safe, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 10/39] tcg/sparc: Make direct jump patching thread-safe, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 05/39] tcg/ppc: Make direct jump patching thread-safe, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 07/39] tcg/s390: Make direct jump patching thread-safe, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 09/39] tcg/aarch64: Make direct jump patching thread-safe, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 11/39] tcg/mips: Make direct jump patching thread-safe, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 12/39] tcg: Note requirement on atomic direct jump patching, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 13/39] translate-all: remove redundant setting of tcg_ctx.code_gen_buffer_size, Richard Henderson, 2016/05/12
- [Qemu-devel] [PULL 15/39] translate-all: Adjust 256mb testing for mips64, Richard Henderson, 2016/05/12