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Re: [Qemu-devel] ARM invalid co-processor register
From: |
Karthik |
Subject: |
Re: [Qemu-devel] ARM invalid co-processor register |
Date: |
Wed, 25 May 2016 18:14:34 +0530 |
Understood. Thank you for the clarifications.
Best regards,
Karthik
On Wed, May 25, 2016 at 6:05 PM, Peter Maydell <address@hidden>
wrote:
> On 25 May 2016 at 13:33, Karthik <address@hidden> wrote:
> > Does the qemu implements cache emulation?
> > I did see some comments saying otherwise.
>
> No, we don't emulate functional caches. This means that all
> the operations for "flush cache" etc can be no-ops. They
> do still have to actually exist and not UNDEF, though.
>
> thanks
> -- PMM
>