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Re: [Qemu-devel] [PATCH v2] i2c: add aspeed i2c controller

From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH v2] i2c: add aspeed i2c controller
Date: Fri, 3 Jun 2016 19:29:39 +0100

On 31 May 2016 at 15:18, Cédric Le Goater <address@hidden> wrote:
> The Aspeed AST2400 integrates a set of 14 I2C/SMBus bus controllers
> directly connected to the APB bus. They can be programmed as master or
> slave but the propopsed model only supports the master mode.
> On the TODO list, we also have :
>  - improve and harden the state machine.
>  - bus recovery support (used by the Linux driver).
>  - transfer mode state machine bits. this is not strictly necessary as
>    it is mostly used for debug. The bus busy bit is deducted from the
>    I2C core engine of qemu.
>  - support of the pool buffer: 2048 bytes of internal SRAM (not used
>    by the Linux driver).
> Signed-off-by: Cédric Le Goater <address@hidden>
> Reviewed-by: Andrew Jeffery <address@hidden>
> ---

Applied to target-arm.next, thanks.

-- PMM

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