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Re: [Qemu-devel] [PATCH v4 5/9] target-avr: adding AVR interrupt handlin
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v4 5/9] target-avr: adding AVR interrupt handling |
Date: |
Mon, 6 Jun 2016 23:17:29 +0100 |
On 6 June 2016 at 22:44, Richard Henderson <address@hidden> wrote:
> On 06/06/2016 03:37 AM, Michael Rolnik wrote:
>>
>> + if (avr_feature(env, AVR_FEATURE_3_BYTE_PC)) {
>> + stb_phys(cs->as, env->sp--, (ret & 0x0000ff));
>> + stb_phys(cs->as, env->sp--, (ret & 0x00ff00) >> 8);
>> + stb_phys(cs->as, env->sp--, (ret & 0xff0000) >> 16);
>> + } else if (avr_feature(env, AVR_FEATURE_2_BYTE_PC)) {
>> + stb_phys(cs->as, env->sp--, (ret & 0x0000ff));
>> + stb_phys(cs->as, env->sp--, (ret & 0x00ff00) >> 8);
>> + } else {
>> + stb_phys(cs->as, env->sp--, (ret & 0x0000ff));
>> + }
>
>
> It would be better to use cpu_stb_data.
Or address_space_stb() if you want to care about getting
the right behaviour if the store fails (we don't really
care about this on many targets at the moment though).
thanks
-- PMM
[Qemu-devel] [PATCH v4 1/9] target-avr: AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructions, Michael Rolnik, 2016/06/06