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Re: [Qemu-devel] [PATCH v3 1/2] target-i386: KVM: add basic Intel LMCE s

From: Paolo Bonzini
Subject: Re: [Qemu-devel] [PATCH v3 1/2] target-i386: KVM: add basic Intel LMCE support
Date: Mon, 13 Jun 2016 10:33:12 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.1.0

On 13/06/2016 09:55, Haozhong Zhang wrote:
> Currently, only VMX bits (bit 1 & 2), LMCE bit (bit 20) as well as
> lock bit (bit 0) in MSR_IA32_FEATURE_CONTROL are used for guest. The
> availability of features indicated by those bits (except the lock bit)
> can be discovered from cpuid and other MSR, so it looks not necessary
> to publish them via fw_cfg. Or do you have other concerns?

I would prefer to avoid having to change the firmware (SeaBIOS and OVMF)
every time a new bit is added.  Using fw_cfg makes it possible to
develop the feature in the firmware once and for all.


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