[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v3 13/20] hw/intc/arm_gicv3: Wire up distributor and
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v3 13/20] hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions |
Date: |
Tue, 14 Jun 2016 15:38:25 +0100 |
Wire up the MMIO functions exposed by the distributor and the
redistributor into MMIO regions exposed by the GICv3 device.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Shannon Zhao <address@hidden>
---
hw/intc/arm_gicv3.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gicv3.c b/hw/intc/arm_gicv3.c
index 171d587..4c1fbb6 100644
--- a/hw/intc/arm_gicv3.c
+++ b/hw/intc/arm_gicv3.c
@@ -324,6 +324,19 @@ static void arm_gicv3_post_load(GICv3State *s)
gicv3_cache_all_target_cpustates(s);
}
+static const MemoryRegionOps gic_ops[] = {
+ {
+ .read_with_attrs = gicv3_dist_read,
+ .write_with_attrs = gicv3_dist_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ },
+ {
+ .read_with_attrs = gicv3_redist_read,
+ .write_with_attrs = gicv3_redist_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ }
+};
+
static void arm_gic_realize(DeviceState *dev, Error **errp)
{
/* Device instance realize function for the GIC sysbus device */
@@ -337,7 +350,7 @@ static void arm_gic_realize(DeviceState *dev, Error **errp)
return;
}
- gicv3_init_irqs_and_mmio(s, gicv3_set_irq, NULL);
+ gicv3_init_irqs_and_mmio(s, gicv3_set_irq, gic_ops);
}
static void arm_gicv3_class_init(ObjectClass *klass, void *data)
--
1.9.1
- [Qemu-devel] [PATCH v3 05/20] target-arm: Add mp-affinity property for ARM CPU class, (continued)
- [Qemu-devel] [PATCH v3 05/20] target-arm: Add mp-affinity property for ARM CPU class, Peter Maydell, 2016/06/14
- [Qemu-devel] [PATCH v3 07/20] hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure, Peter Maydell, 2016/06/14
- [Qemu-devel] [PATCH v3 03/20] target-arm: Define new arm_is_el3_or_mon() function, Peter Maydell, 2016/06/14
- [Qemu-devel] [PATCH v3 08/20] hw/intc/arm_gicv3: Add vmstate descriptors, Peter Maydell, 2016/06/14
- [Qemu-devel] [PATCH v3 12/20] hw/intc/arm_gicv3: Implement GICv3 redistributor registers, Peter Maydell, 2016/06/14
- [Qemu-devel] [PATCH v3 06/20] hw/intc/arm_gicv3: Add state information, Peter Maydell, 2016/06/14
- [Qemu-devel] [PATCH v3 11/20] hw/intc/arm_gicv3: Implement GICv3 distributor registers, Peter Maydell, 2016/06/14
- [Qemu-devel] [PATCH v3 13/20] hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions,
Peter Maydell <=
- [Qemu-devel] [PATCH v3 20/20] target-arm/monitor.c: Advertise emulated GICv3 in capabilities, Peter Maydell, 2016/06/14
- [Qemu-devel] [PATCH v3 18/20] hw/intc/arm_gicv3: Add IRQ handling CPU interface registers, Peter Maydell, 2016/06/14
- Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation, Shannon Zhao, 2016/06/14
- Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation, Shannon Zhao, 2016/06/15