Re: [Qemu-devel] [PATCH V10 0/9] Xilinx DisplayPort.

[Peter Maydell]

On 14 June 2016 at 14:59, Peter Maydell <address@hidden> wrote:
> On 13 June 2016 at 16:50,  <address@hidden> wrote:
>> From: KONRAD Frederic <address@hidden>
>>
>> This is the 10th version of this patch-set of the implementation of the 
>> Xilinx
>> DisplayPort and DPDMA.
>>
>> This 10th version fixes one bug with the I2C broadcast patch.

I found some minor build issues in this series, which I'm just going
to fix up in my tree rather than making you respin this:


Format string issues which mean it doesn't build on OSX or 32-bit hosts:

/home/petmay01/linaro/qemu-for-merges/hw/display/xlnx_dp.c:700:5:
error: format ‘%lX’ expects argument of type ‘long unsigned int’, but
argument 3 has type ‘uint64_t’ [-Werror=format=]
/home/petmay01/linaro/qemu-for-merges/hw/display/xlnx_dp.c:709:5:
error: format ‘%lX’ expects argument of type ‘long unsigned int’, but
argument 3 has type ‘uint64_t’ [-Werror=format=]

Clang build issues:

/Users/pm215/src/qemu-for-merges/hw/i2c/i2c-ddc.c:284:33: warning:
unused variable 'vmstate_i2c_ddc' [-Wunused-const-variable]

(vmstate wasn't actually wired up to dc->vmsd)

/Users/pm215/src/qemu-for-merges/hw/dma/xlnx_dpdma.c:307:20: warning:
unused function 'xlnx_dpdma_set_desc_next_address' [-Wunused-function]


Full diff of fixups:

diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
index 552955f..be53b75 100644
--- a/hw/display/xlnx_dp.c
+++ b/hw/display/xlnx_dp.c
@@ -697,7 +697,7 @@ static uint64_t xlnx_dp_read(void *opaque, hwaddr
offset, unsigned size)
         break;
     }

-    DPRINTF("core read @%" PRIx64 " = 0x%8.8lX\n", offset << 2, ret);
+    DPRINTF("core read @%" PRIx64 " = 0x%8.8" PRIX64 "\n", offset << 2, ret);
     return ret;
 }

@@ -706,7 +706,7 @@ static void xlnx_dp_write(void *opaque, hwaddr
offset, uint64_t value,
 {
     XlnxDPState *s = XLNX_DP(opaque);

-    DPRINTF("core write @%" PRIx64 " = 0x%8.8lX\n", offset, value);
+    DPRINTF("core write @%" PRIx64 " = 0x%8.8" PRIX64 "\n", offset, value);

     offset = offset >> 2;

diff --git a/hw/dma/xlnx_dpdma.c b/hw/dma/xlnx_dpdma.c
index 97a5da7..8ceb21d 100644
--- a/hw/dma/xlnx_dpdma.c
+++ b/hw/dma/xlnx_dpdma.c
@@ -304,14 +304,6 @@ static uint64_t
xlnx_dpdma_descriptor_next_address(XlnxDPDMAState *s,
            + s->registers[DPDMA_DSCR_NEXT_ADDR_CH(channel)];
 }

-static inline void xlnx_dpdma_set_desc_next_address(XlnxDPDMAState *s,
-                                                      uint8_t channel,
-                                                      uint64_t addr)
-{
-    s->registers[DPDMA_DSCR_NEXT_ADDRE_CH(channel)] = extract64(addr, 32, 32);
-    s->registers[DPDMA_DSCR_NEXT_ADDR_CH(channel)] = extract64(addr, 0, 32);
-}
-
 static bool xlnx_dpdma_is_channel_enabled(XlnxDPDMAState *s,
                                             uint8_t channel)
 {
diff --git a/hw/i2c/i2c-ddc.c b/hw/i2c/i2c-ddc.c
index 02cd374..b47ec9a 100644
--- a/hw/i2c/i2c-ddc.c
+++ b/hw/i2c/i2c-ddc.c
@@ -270,27 +270,28 @@ static void i2c_ddc_init(Object *obj)
     build_edid_blob(&lcd_edid, s->edid_blob);
 }

+static const VMStateDescription vmstate_i2c_ddc = {
+    .name = TYPE_I2CDDC,
+    .version_id = 1,
+    .fields = (VMStateField[]) {
+        VMSTATE_BOOL(firstbyte, I2CDDCState),
+        VMSTATE_UINT8(reg, I2CDDCState),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 static void i2c_ddc_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
     I2CSlaveClass *isc = I2C_SLAVE_CLASS(oc);

     dc->reset = i2c_ddc_reset;
+    dc->vmsd = &vmstate_ic2_ddc;
     isc->event = i2c_ddc_event;
     isc->recv = i2c_ddc_rx;
     isc->send = i2c_ddc_tx;
 }

-static const VMStateDescription vmstate_i2c_ddc = {
-    .name = TYPE_I2CDDC,
-    .version_id = 1,
-    .fields = (VMStateField[]) {
-        VMSTATE_BOOL(firstbyte, I2CDDCState),
-        VMSTATE_UINT8(reg, I2CDDCState),
-        VMSTATE_END_OF_LIST()
-    }
-};
-
 static TypeInfo i2c_ddc_info = {
     .name = TYPE_I2CDDC,
     .parent = TYPE_I2C_SLAVE,



thanks
-- PMM