[Qemu-devel] [PATCH v2 0/3] Second try at fixing sparc register allocation

[Richard Henderson]

Attempting to fix the problem reported by Mark re i686 vs sparc64.

Unsurprisingly, the problems tend to revolve around the 6 operand
opcodes like sub2 or qemu_st64, where we use all, or all but one
register.


r~


Richard Henderson (3):
  tcg: Fix name for high-half register
  tcg: Optimize spills of constants
  tcg: Rearrange register allocation

 tcg/aarch64/tcg-target.inc.c |  10 ++
 tcg/arm/tcg-target.inc.c     |   6 +
 tcg/i386/tcg-target.inc.c    |  21 ++-
 tcg/ia64/tcg-target.inc.c    |  10 ++
 tcg/mips/tcg-target.inc.c    |  10 ++
 tcg/ppc/tcg-target.inc.c     |   6 +
 tcg/s390/tcg-target.inc.c    |   6 +
 tcg/sparc/tcg-target.inc.c   |  10 ++
 tcg/tcg.c                    | 409 +++++++++++++++++++++++++++++--------------
 tcg/tci/tcg-target.inc.c     |   6 +
 10 files changed, 351 insertions(+), 143 deletions(-)

-- 
2.5.5