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[Qemu-devel] [PATCH 0/8] pnv: more fixes to the exception model

From: Cédric Le Goater
Subject: [Qemu-devel] [PATCH 0/8] pnv: more fixes to the exception model
Date: Mon, 27 Jun 2016 08:55:13 +0200


Here are a couple more patches on the exception model and LPCR which
are surrounding the pnv core patches. The first is a prereq for all
the patches to apply, and it did not seem too much of a problem adding



Benjamin Herrenschmidt (8):
  ppc: Add a bunch of hypervisor SPRs to Book3s
  ppc: Update LPCR definitions
  ppc: Use a helper to filter writes to LPCR
  ppc: Fix conditions for delivering external interrupts to a guest
  ppc: Enforce setting MSR:EE,IR and DR when MSR:PR is set
  ppc: Initial HDEC support
  ppc: LPCR is a HV resource
  ppc: Print HSRR0/HSRR1 in "info registers"

 hw/ppc/ppc.c                 |  17 ++--
 target-ppc/cpu.h             |  16 +++-
 target-ppc/excp_helper.c     |  41 +++++----
 target-ppc/helper.h          |   3 +
 target-ppc/helper_regs.h     |   4 +
 target-ppc/mmu-hash64.c      |  57 +++++++++++++
 target-ppc/timebase_helper.c |  10 +++
 target-ppc/translate.c       |   7 ++
 target-ppc/translate_init.c  | 194 +++++++++++++++++++++++++++++++++++++++----
 9 files changed, 304 insertions(+), 45 deletions(-)


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