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Re: [Qemu-devel] [RFC 00/30] cmpxchg-based emulation of atomics

From: Richard Henderson
Subject: Re: [Qemu-devel] [RFC 00/30] cmpxchg-based emulation of atomics
Date: Tue, 28 Jun 2016 08:48:28 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.1.1

On 06/28/2016 01:45 AM, Lluís Vilanova wrote:
Emilio G Cota writes:
- What to do when atomic ops are used on something other than RAM?
  Should we have a "slow path" that is not atomic for these cases, or
  it's OK to assume code is bogus? For now, I just wrote XXX.

You mean, for example, on I/O space? In these cases, it depends on the specific
device you're accessing and the interconnect used to access it.

TL;DR: In some cases, it makes sense to support atomics outside RAM.

For example, PCIe has support for expressing atomic operations in its messages
(I'm sure other interconnects do too). But in the end it depends on whether the
device supports them (I'm not sure if the device can reject atomics and produce
an error to whomever tried to do the atomic access, or if they are simply

Indeed. Thankfully, that's rare. Many cpus explicitly say that the atomic ops can't be used on non-cachable memory, since they use the cache coherency protocol to implement the atomicity.

That said, I can imagine that this probably works on x86, and supporting this is going to require a stop-the-world kind of emulation.


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