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Re: [Qemu-devel] [PATCH v4 00/24] target-sparc improvements

From: Mark Cave-Ayland
Subject: Re: [Qemu-devel] [PATCH v4 00/24] target-sparc improvements
Date: Tue, 28 Jun 2016 23:44:35 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Icedove/45.1.0

On 28/06/16 01:38, Richard Henderson wrote:

> The primary focus of this patch set is to reduce the number of
> helpers that modify TCG globals, and thus increase the lifetime
> of those globals within each TB, and thus decrease the number
> of times that tcg must spill and fill them from backing store.
> As a byproduct, I also implement the bulk of the interesting v9 ASIs
> inline, thus exposing e.g. the little-endian loads and stores as
> simple tcg operations.
> The patch set is relative to my outstanding tcg pull request.
> For reference, the complete tree can be found at
>   git://github.com/rth7680/qemu.git tgt-sparc-2
> Changes from v3 to v4:
>   * Re-do the UA2005 commit change, which apparently got lost in v3.
>   * Rebased on aa8151b7df, which contains fix for the ldstub issue.
> Changes from v2 to v3:
>   * Add ASI_BLK_COMMIT_[PS] to patch 19.
>     This fixes the illegal instruction that Artyom reported.
>   * Add gen_address_mask calls to all direct accesses.
>     This fixes a follow-on segv that affected the debian install.
> Changes from v1 to v2:
>   * Commit message refers to UA2005 instead of UA2011 when
>     introducing new asi.h defines. (Artyom)
>   * Drop MMU_REAL_IDX, and inline handling of ASI_REAL_*.
>     This appears to be the source of the regression that Artyom
>     identified wrt ss5 emulation.
> r~
> Richard Henderson (24):
>   target-sparc: Mark more flags for helpers
>   target-sparc: Remove softint as a TCG global
>   target-sparc: Store mmu index in TB flags
>   target-sparc: Create gen_exception
>   target-sparc: Unify asi handling between 32 and 64-bit
>   target-sparc: Store %asi in TB flags
>   target-sparc: Introduce get_asi
>   target-sparc: Pass TCGMemOp to gen_ld/st_asi
>   target-sparc: Import linux/arch/sparc/include/uapi/asm/asi.h
>   target-sparc: Add UA2005 defines to asi.h
>   target-sparc: Use defines from asi.h
>   target-sparc: Directly implement easy ld/st asis
>   target-sparc: Use QT0 to return results from ldda
>   target-sparc: Introduce gen_check_align
>   target-sparc: Directly implement easy ldd/std asis
>   target-sparc: Fix obvious error in ASI_M_BFILL
>   target-sparc: Pass TCGMemOp constants to helper_ld/st_asi
>   target-sparc: Directly implement easy ldf/stf asis
>   target-sparc: Directly implement block and short ldf/stf asis
>   target-sparc: Remove helper_ldf_asi, helper_stf_asi
>   target-sparc: Use explicit writes to cpu_fsr
>   target-sparc: Use cpu_fsr in stfsr
>   target-sparc: Use cpu_loop_exit_restore from
>     helper_check_ieee_exceptions
>   target-sparc: Elide duplicate updates to fprs
>  target-sparc/asi.h         |  311 +++++++++++
>  target-sparc/cpu.h         |   28 +-
>  target-sparc/fop_helper.c  |  230 +++-----
>  target-sparc/helper.h      |  168 +++---
>  target-sparc/ldst_helper.c |  696 +++++++++++-------------
>  target-sparc/translate.c   | 1273 
> ++++++++++++++++++++++++++++----------------
>  6 files changed, 1607 insertions(+), 1099 deletions(-)
>  create mode 100644 target-sparc/asi.h

Hi Richard,

I didn't see the branch rebase onto aa8151b7df here, although I was able
to manually rebase the tgt-sparc-2 branch onto git master and build
without issues.

With that, I ran through all my OpenBIOS boot tests for SPARC32/SPARC64
and all my images booted fine without any regressions.

Tested-by: Mark Cave-Ayland <address@hidden>



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