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[Qemu-devel] [PULL 07/23] hw/arm/virt: mark the PCIe host controller as
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 07/23] hw/arm/virt: mark the PCIe host controller as DMA coherent in the DT |
Date: |
Mon, 4 Jul 2016 13:22:38 +0100 |
From: Ard Biesheuvel <address@hidden>
Since QEMU performs cacheable accesses to guest memory when doing DMA
as part of the implementation of emulated PCI devices, guest drivers
should use cacheable accesses as well when running under KVM. Since this
essentially means that emulated PCI devices are DMA coherent, set the
'dma-coherent' DT property on the PCIe host controller DT node.
This brings the DT description into line with the ACPI description,
which already marks the PCI bridge as cache coherent (see commit
bc64b96c984abf).
Signed-off-by: Ard Biesheuvel <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index c5c125e..6e098af 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1021,6 +1021,7 @@ static void create_pcie(const VirtBoardInfo *vbi,
qemu_irq *pic,
qemu_fdt_setprop_cell(vbi->fdt, nodename, "#size-cells", 2);
qemu_fdt_setprop_cells(vbi->fdt, nodename, "bus-range", 0,
nr_pcie_buses - 1);
+ qemu_fdt_setprop(vbi->fdt, nodename, "dma-coherent", NULL, 0);
if (vbi->v2m_phandle) {
qemu_fdt_setprop_cells(vbi->fdt, nodename, "msi-parent",
--
1.9.1
- [Qemu-devel] [PULL 00/23] target-arm queue, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 16/23] ssi: change ssi_slave_init to be a realize ops, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 08/23] bitops: Add MAKE_64BIT_MASK macro, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 13/23] register: Add block initialise helper, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 11/23] register: Define REG and FIELD macros, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 10/23] register: Add Memory API glue, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 23/23] ast2400: create SPI flash slaves, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 06/23] armv7m_nvic: Use qemu_get_cpu(0) instead of current_cpu, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 07/23] hw/arm/virt: mark the PCIe host controller as DMA coherent in the DT,
Peter Maydell <=
- [Qemu-devel] [PULL 01/23] linux-user: Make semihosting heap/stack fields abi_ulongs, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 21/23] ast2400: add SMC controllers (FMC and SPI), Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 17/23] m25p80: do not put iovec on the stack, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 05/23] memory: Assert that memory_region_init_rom_device() ops aren't NULL, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 19/23] m25p80: change cur_addr to 32 bit integer, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 12/23] register: QOMify, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 03/23] memory: Provide memory_region_init_rom(), Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 02/23] target-arm/arm-semi.c: Fix SYS_HEAPINFO for 64-bit guests, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 20/23] m25p80: qdev-ify drive property, Peter Maydell, 2016/07/04
- [Qemu-devel] [PULL 09/23] register: Add Register API, Peter Maydell, 2016/07/04