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Re: [Qemu-devel] [PATCH v5 15/17] ppc/pnv: Add cut down PSI bridge model
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-devel] [PATCH v5 15/17] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt |
Date: |
Tue, 25 Oct 2016 13:00:26 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 |
>> +#define PSIHB_MMIO_BAR 0x00
>> +#define PSIHB_MMIO_FSPBAR 0x08
>> +#define PSIHB_MMIO_CR 0x20
>> +#define PSIHB_MMIO_SEMR 0x28
>> +#define PSIHB_MMIO_XIVR_PSI 0x30
>> +#define PSIHB_MMIO_SCR 0x40
>> +#define PSIHB_MMIO_CCR 0x48
>> +#define PSIHB_MMIO_DMA_UPADD 0x50
>> +#define PSIHB_MMIO_IRQ_STAT 0x58
>> +#define PSIHB_MMIO_XIVR_OCC 0x60
>> +#define PSIHB_MMIO_XIVR_FSI 0x68
>> +#define PSIHB_MMIO_XIVR_LPCI2C 0x70
>> +#define PSIHB_MMIO_XIVR_LOCERR 0x78
>> +#define PSIHB_MMIO_XIVR_EXT 0x80
>> +#define PSIHB_MMIO_IRSN 0x88
>> +#define PSIHB_MMIO_MAX 0x100
>> +
>> +static const uint32_t psi_mmio_to_xscom[PSIHB_MMIO_MAX / 8] = {
>
> AFAICT, this table lookup works out as:
> xscom_addr = (mmio_addr / 8) + 0xa
>
> Which makes an actual table seem like overkill.
>
>
> And in fact, since you have a /8 here, and the *8 in the xscom address
> space encoding, I suspect you could just alias the same IO region into
> both SCOM and MMIO address spaces to avoid having two dispatchers.
yes. I think this is possible. I will work on it.
Thanks,
C.
- Re: [Qemu-devel] [PATCH v5 13/17] ppc/xics: add a xics_get_cpu_index_by_pir helper, (continued)
[Qemu-devel] [PATCH v5 14/17] ppc/xics: introduce a helper to insert a new ics, Cédric Le Goater, 2016/10/22
[Qemu-devel] [PATCH v5 15/17] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt, Cédric Le Goater, 2016/10/22
[Qemu-devel] [PATCH v5 16/17] ppc/pnv: Add OCC model stub with interrupt support, Cédric Le Goater, 2016/10/22
[Qemu-devel] [PATCH v5 17/17] ppc/pnv: Add Naples chip support for LPC interrupts, Cédric Le Goater, 2016/10/22
[Qemu-devel] [PATCH v5 01/17] ppc: add skiboot firmware for the pnv platform, Cédric Le Goater, 2016/10/22
Re: [Qemu-devel] [PATCH v5 00/17] ppc/pnv: booting the kernel and reaching user space, David Gibson, 2016/10/24