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[Qemu-devel] [PULL 1/9] i.MX: Fix GPIO ISR register write


From: Peter Maydell
Subject: [Qemu-devel] [PULL 1/9] i.MX: Fix GPIO ISR register write
Date: Fri, 28 Oct 2016 15:59:16 +0100

From: Guenter Roeck <address@hidden>

Writing the ISR register is supposed to clear interrupt status bits,
not to set them.

This patch makes '-M sabrelite' work without devicetree changes (Linux
kernel versions 3.18 to 4.7 with imx_v6_v7_defconfig and up to v4.8 with
multi_v7_defconfig; mainline has different problems).

Signed-off-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Acked-by: Jean-Christophe Dubois <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
 hw/gpio/imx_gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/gpio/imx_gpio.c b/hw/gpio/imx_gpio.c
index f3574aa..c36c394 100644
--- a/hw/gpio/imx_gpio.c
+++ b/hw/gpio/imx_gpio.c
@@ -237,7 +237,7 @@ static void imx_gpio_write(void *opaque, hwaddr offset, 
uint64_t value,
         break;
 
     case ISR_ADDR:
-        s->isr |= ~value;
+        s->isr &= ~value;
         imx_gpio_set_all_int_lines(s);
         break;
 
-- 
2.7.4




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