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[Qemu-devel] [PATCH v3 0/5] Added 7 instructions to the tricore target

From: Bastian Koppelmann
Subject: [Qemu-devel] [PATCH v3 0/5] Added 7 instructions to the tricore target
Date: Fri, 11 Nov 2016 15:20:13 +0100


this series was originally posted by Peer Adelt some time ago[1], but still had 
some problems
which I tried to fix with this patch set.

The tricky bits here were the FTOUZ and MADD/MSUB.F instructions. The latter 
had the
problem of not giving back the correct NAN when the result of the add/sub of 
was invalid. I addressed that by fixing up the value later, which feels hacky. 
I feel
the better solution would be extending softfloat to recognize ADD_NAN's and
emitting the correct NAN there. On the other hand it's a change in softfloat 
for a small
edge case.

Additionally this patch set adds the UPDFL instructions.


v2 -> v3:
    [01/05] simplified exception flag fixup in ftouz()
    [02/05] f_maddsub_nan_result() now gets a boolean value indicating whether 
the muladd_negate_c flag is set.
    [03/05] Allocate temporaries only when needed.
    [05/05] Add fpu_set_state() to update softfloats rounding mode
    [05/05] Move generation of the updfl helper to decode_rr_divide()

v1 -> v2:
    [01/05] ftouz: Correctly convert the result from uint32 to f32

Bastian Koppelmann (3):
  target-tricore: Added FTOUZ instruction
  target-tricore: Added MADD.F and MSUB.F instructions
  target-tricore: Add updfl instruction

Peer Adelt (2):
  target-tricore: Added new MOV instruction variant
  target-tricore: Added new JNE instruction variant

 target-tricore/fpu_helper.c      | 134 ++++++++++++++++++++++++++++++++++++++-
 target-tricore/helper.h          |   4 ++
 target-tricore/translate.c       |  48 ++++++++++++++
 target-tricore/tricore-opcodes.h |   3 +
 4 files changed, 188 insertions(+), 1 deletion(-)


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