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[Qemu-devel] [PATCH 00/25] tcg: Handle clz, ctz, and clrsb generically
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 00/25] tcg: Handle clz, ctz, and clrsb generically |
Date: |
Wed, 16 Nov 2016 20:25:10 +0100 |
As you can see from the diffstat below, almost every target was
defining its own helpers for these common bit manipulation ops.
In the case of ctz and clz, they are often central to string search
routines such as strlen, so it does benefit us to make them fast.
So I do go ahead and add those as tcg opcodes, that can be handled
by the tcg backends.
One perhaps surprising thing about my definition of these opcodes
is that they take an explicit argument for the value to return when
the input is zero.
In the vast majority of cases this we simply pass a constant that is
the width of the argument. But it turns out to have a number of uses
when implementing target-i386 (bsf does not change the register),
target-openrisc (ff1 = ffs(3)), decomposing 64-bit clz/ctz for
a 32-bit host, and actually implementing tcg/i386 (forcing the value
into a register for input to cmov).
Lightly tested with x86_64 and ppc64 hosts.
r~
Richard Henderson (25):
tcg: Add clz and ctz opcodes
target-alpha: Use the ctz and clz opcodes
target-cris: Use clz opcode
target-microblaze: Use clz opcode
target-mips: Use clz opcode
target-openrisc: Use clz and ctz opcodes
target-ppc: Use clz and ctz opcodes
target-s390x: Use clz opcode
target-tilegx: Use clz and ctz opcodes
target-tricore: Use clz opcode
target-unicore32: Use clz opcode
target-xtensa: Use clz opcode
target-arm: Use clz opcode
target-i386: Use clz and ctz opcodes
disas/i386.c: Handle tzcnt
tcg/i386: Handle ctz and clz opcodes
tcg/ppc: Handle ctz and clz opcodes
tcg/aarch64: Handle ctz and clz opcodes
tcg/arm: Handle ctz and clz opcodes
tcg/mips: Handle clz opcode
tcg/s390: Handle clz opcode
tcg: Add helpers for clrsb
target-arm: Use clrsb helper
target-tricore: Use clrsb helper
target-xtensa: Use clrsb helper
disas/i386.c | 12 ++++-
target-alpha/helper.h | 2 -
target-alpha/int_helper.c | 10 ----
target-alpha/translate.c | 4 +-
target-arm/helper-a64.c | 20 --------
target-arm/helper-a64.h | 4 --
target-arm/helper.c | 5 --
target-arm/helper.h | 1 -
target-arm/translate-a64.c | 16 +++---
target-arm/translate.c | 6 +--
target-cris/helper.h | 1 -
target-cris/op_helper.c | 5 --
target-cris/translate.c | 2 +-
target-i386/helper.h | 2 -
target-i386/int_helper.c | 11 ----
target-i386/translate.c | 31 ++++++------
target-microblaze/helper.h | 1 -
target-microblaze/op_helper.c | 5 --
target-microblaze/translate.c | 2 +-
target-mips/helper.h | 7 ---
target-mips/op_helper.c | 22 --------
target-mips/translate.c | 23 ++++++---
target-openrisc/helper.h | 2 -
target-openrisc/int_helper.c | 19 -------
target-openrisc/translate.c | 6 ++-
target-ppc/helper.h | 4 --
target-ppc/int_helper.c | 20 --------
target-ppc/translate.c | 20 ++++++--
target-s390x/helper.h | 1 -
target-s390x/int_helper.c | 6 ---
target-s390x/translate.c | 2 +-
target-tilegx/helper.c | 10 ----
target-tilegx/helper.h | 2 -
target-tilegx/translate.c | 4 +-
target-tricore/helper.h | 3 --
target-tricore/op_helper.c | 15 ------
target-tricore/translate.c | 7 +--
target-unicore32/helper.c | 10 ----
target-unicore32/helper.h | 3 --
target-unicore32/translate.c | 6 +--
target-xtensa/helper.h | 2 -
target-xtensa/op_helper.c | 13 -----
target-xtensa/translate.c | 4 +-
tcg-runtime.c | 30 +++++++++++
tcg/README | 8 +++
tcg/aarch64/tcg-target.h | 4 ++
tcg/aarch64/tcg-target.inc.c | 47 +++++++++++++++++
tcg/arm/tcg-target.h | 2 +
tcg/arm/tcg-target.inc.c | 27 ++++++++++
tcg/i386/tcg-target.h | 4 ++
tcg/i386/tcg-target.inc.c | 83 ++++++++++++++++++++++++++----
tcg/ia64/tcg-target.h | 4 ++
tcg/mips/tcg-target.h | 2 +
tcg/mips/tcg-target.inc.c | 34 +++++++++++++
tcg/optimize.c | 36 +++++++++++++
tcg/ppc/tcg-target.h | 4 ++
tcg/ppc/tcg-target.inc.c | 57 +++++++++++++++++++++
tcg/s390/tcg-target.h | 4 ++
tcg/s390/tcg-target.inc.c | 36 ++++++++++++-
tcg/sparc/tcg-target.h | 4 ++
tcg/tcg-op.c | 114 ++++++++++++++++++++++++++++++++++++++++++
tcg/tcg-op.h | 20 ++++++++
tcg/tcg-opc.h | 4 ++
tcg/tcg-runtime.h | 7 +++
tcg/tcg.h | 2 +
tcg/tci/tcg-target.h | 4 ++
66 files changed, 614 insertions(+), 274 deletions(-)
--
2.7.4
- [Qemu-devel] [PATCH 00/25] tcg: Handle clz, ctz, and clrsb generically,
Richard Henderson <=
- [Qemu-devel] [PATCH 02/25] target-alpha: Use the ctz and clz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 03/25] target-cris: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 04/25] target-microblaze: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 01/25] tcg: Add clz and ctz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 05/25] target-mips: Use clz opcode, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 06/25] target-openrisc: Use clz and ctz opcodes, Richard Henderson, 2016/11/16
- [Qemu-devel] [PATCH 07/25] target-ppc: Use clz and ctz opcodes, Richard Henderson, 2016/11/16