[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v2 7/7] target-ppc: Implement bcdtrunc. instruct
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [PATCH v2 7/7] target-ppc: Implement bcdtrunc. instruction |
Date: |
Wed, 7 Dec 2016 16:48:03 +1100 |
User-agent: |
Mutt/1.7.1 (2016-10-04) |
On Tue, Dec 06, 2016 at 05:40:10PM -0200, Jose Ricardo Ziviani wrote:
> bcdutrunc. Decimal unsigned truncate. Works like bcdtrunc. with
> unsigned BCD numbers.
>
> Signed-off-by: Jose Ricardo Ziviani <address@hidden>
Short description (subject line) says 'bcdtrunc.' instead of
'bcdutrunc'.
Also same comment as previous patch.
> ---
> target-ppc/helper.h | 1 +
> target-ppc/int_helper.c | 39
> +++++++++++++++++++++++++++++++++++++
> target-ppc/translate/vmx-impl.inc.c | 4 ++++
> target-ppc/translate/vmx-ops.inc.c | 2 +-
> 4 files changed, 45 insertions(+), 1 deletion(-)
>
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index 49965b0..52a2707 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -396,6 +396,7 @@ DEF_HELPER_4(bcds, i32, avr, avr, avr, i32)
> DEF_HELPER_4(bcdus, i32, avr, avr, avr, i32)
> DEF_HELPER_4(bcdsr, i32, avr, avr, avr, i32)
> DEF_HELPER_4(bcdtrunc, i32, avr, avr, avr, i32)
> +DEF_HELPER_4(bcdutrunc, i32, avr, avr, avr, i32)
>
> DEF_HELPER_2(xsadddp, void, env, i32)
> DEF_HELPER_2(xssubdp, void, env, i32)
> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> index faf34c1..6167f52 100644
> --- a/target-ppc/int_helper.c
> +++ b/target-ppc/int_helper.c
> @@ -3212,6 +3212,45 @@ uint32_t helper_bcdtrunc(ppc_avr_t *r, ppc_avr_t *a,
> ppc_avr_t *b, uint32_t ps)
> return cr;
> }
>
> +uint32_t helper_bcdutrunc(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t
> ps)
> +{
> + int i;
> + uint8_t digit;
> + uint8_t trunc;
> + int ox_flag = 0;
> + int invalid = 0;
> + ppc_avr_t ret = *b;
> +
> +#if defined(HOST_WORDS_BIGENDIAN)
> + int upper = ARRAY_SIZE(a->u16) - 1;
> +#else
> + int upper = 0;
> +#endif
> +
> + trunc = 32 - (a->u16[upper] % 33);
> + for (i = 0; i < 32; i++) {
> + digit = bcd_get_digit(b, i, &invalid);
> +
> + if (unlikely(invalid)) {
> + return CRF_SO;
> + }
> +
> + if (i >= trunc) {
> + if (unlikely(!ox_flag && digit > 0x0)) {
> + ox_flag = 1;
> + }
> + bcd_put_digit(&ret, 0, i);
> + }
> + }
> +
> + *r = ret;
> + if (r->u64[HI_IDX] == 0 && r->u64[LO_IDX] == 0) {
> + return (ox_flag) ? CRF_SO | CRF_EQ : CRF_EQ;
> + } else {
> + return (ox_flag) ? CRF_SO | CRF_GT : CRF_GT;
> + }
> +}
> +
> void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
> {
> int i;
> diff --git a/target-ppc/translate/vmx-impl.inc.c
> b/target-ppc/translate/vmx-impl.inc.c
> index 1683f42..3cb6fc2 100644
> --- a/target-ppc/translate/vmx-impl.inc.c
> +++ b/target-ppc/translate/vmx-impl.inc.c
> @@ -1020,6 +1020,7 @@ GEN_BCD(bcds);
> GEN_BCD(bcdus);
> GEN_BCD(bcdsr);
> GEN_BCD(bcdtrunc);
> +GEN_BCD(bcdutrunc);
>
> static void gen_xpnd04_1(DisasContext *ctx)
> {
> @@ -1102,6 +1103,9 @@ GEN_VXFORM_DUAL(vsubsbs, PPC_ALTIVEC, PPC_NONE, \
> bcdtrunc, PPC_NONE, PPC2_ISA300)
> GEN_VXFORM_DUAL(vsubuqm, PPC2_ALTIVEC_207, PPC_NONE, \
> bcdtrunc, PPC_NONE, PPC2_ISA300)
> +GEN_VXFORM_DUAL(vsubcuq, PPC2_ALTIVEC_207, PPC_NONE, \
> + bcdutrunc, PPC_NONE, PPC2_ISA300)
> +
>
> static void gen_vsbox(DisasContext *ctx)
> {
> diff --git a/target-ppc/translate/vmx-ops.inc.c
> b/target-ppc/translate/vmx-ops.inc.c
> index e6167a4..139f80c 100644
> --- a/target-ppc/translate/vmx-ops.inc.c
> +++ b/target-ppc/translate/vmx-ops.inc.c
> @@ -149,8 +149,8 @@ GEN_VXFORM_DUAL(vsubsws, xpnd04_2, 0, 30, PPC_ALTIVEC,
> PPC_NONE),
> GEN_VXFORM_207(vadduqm, 0, 4),
> GEN_VXFORM_207(vaddcuq, 0, 5),
> GEN_VXFORM_DUAL(vaddeuqm, vaddecuq, 30, 0xFF, PPC_NONE, PPC2_ALTIVEC_207),
> -GEN_VXFORM_207(vsubcuq, 0, 21),
> GEN_VXFORM_DUAL(vsubuqm, bcdtrunc, 0, 20, PPC2_ALTIVEC_207, PPC2_ISA300),
> +GEN_VXFORM_DUAL(vsubcuq, bcdutrunc, 0, 21, PPC2_ALTIVEC_207, PPC2_ISA300),
> GEN_VXFORM_DUAL(vsubeuqm, vsubecuq, 31, 0xFF, PPC_NONE, PPC2_ALTIVEC_207),
> GEN_VXFORM(vrlb, 2, 0),
> GEN_VXFORM(vrlh, 2, 1),
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
- Re: [Qemu-devel] [PATCH v2 1/7] target-ppc: Implement bcd_is_valid function, (continued)
- [Qemu-devel] [PATCH v2 3/7] target-ppc: Implement bcds. instruction, Jose Ricardo Ziviani, 2016/12/06
- [Qemu-devel] [PATCH v2 2/7] target-ppc: Implement unsigned quadword left/right shift and unit tests, Jose Ricardo Ziviani, 2016/12/06
- [Qemu-devel] [PATCH v2 4/7] target-ppc: Implement bcdus. instruction, Jose Ricardo Ziviani, 2016/12/06
- [Qemu-devel] [PATCH v2 5/7] target-ppc: Implement bcdsr. instruction, Jose Ricardo Ziviani, 2016/12/06
- [Qemu-devel] [PATCH v2 6/7] target-ppc: Implement bcdtrunc. instruction, Jose Ricardo Ziviani, 2016/12/06
- [Qemu-devel] [PATCH v2 7/7] target-ppc: Implement bcdtrunc. instruction, Jose Ricardo Ziviani, 2016/12/06
- Re: [Qemu-devel] [PATCH v2 7/7] target-ppc: Implement bcdtrunc. instruction,
David Gibson <=