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[Qemu-devel] [PATCH 04/23] hw/arm/virt: add 2.9 machine type
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 04/23] hw/arm/virt: add 2.9 machine type |
Date: |
Tue, 13 Dec 2016 10:36:05 +0000 |
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Andrew Jones <address@hidden>
---
include/hw/compat.h | 3 +++
hw/arm/virt.c | 19 +++++++++++++++++--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/include/hw/compat.h b/include/hw/compat.h
index 0f06e11..f8b8354 100644
--- a/include/hw/compat.h
+++ b/include/hw/compat.h
@@ -1,6 +1,9 @@
#ifndef HW_COMPAT_H
#define HW_COMPAT_H
+#define HW_COMPAT_2_8 \
+ /* empty */
+
#define HW_COMPAT_2_7 \
{\
.driver = "virtio-pci",\
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index d04e4ac..11c53a5 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1525,7 +1525,7 @@ static void machvirt_machine_init(void)
}
type_init(machvirt_machine_init);
-static void virt_2_8_instance_init(Object *obj)
+static void virt_2_9_instance_init(Object *obj)
{
VirtMachineState *vms = VIRT_MACHINE(obj);
@@ -1558,10 +1558,25 @@ static void virt_2_8_instance_init(Object *obj)
"Valid values are 2, 3 and host", NULL);
}
+static void virt_machine_2_9_options(MachineClass *mc)
+{
+}
+DEFINE_VIRT_MACHINE_AS_LATEST(2, 9)
+
+#define VIRT_COMPAT_2_8 \
+ HW_COMPAT_2_8
+
+static void virt_2_8_instance_init(Object *obj)
+{
+ virt_2_9_instance_init(obj);
+}
+
static void virt_machine_2_8_options(MachineClass *mc)
{
+ virt_machine_2_9_options(mc);
+ SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_8);
}
-DEFINE_VIRT_MACHINE_AS_LATEST(2, 8)
+DEFINE_VIRT_MACHINE(2, 8)
#define VIRT_COMPAT_2_7 \
HW_COMPAT_2_7
--
2.7.4
- [Qemu-devel] [PATCH 13/23] hw/intc/gicv3: Add defines for ICH system register fields, (continued)
- [Qemu-devel] [PATCH 13/23] hw/intc/gicv3: Add defines for ICH system register fields, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 16/23] hw/intc/arm_gicv3: Implement ICV_ registers which are just accessors, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 17/23] hw/intc/arm_gicv3: Implement ICV_ HPPIR, DIR and RPR registers, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 15/23] hw/intc/arm_gicv3: Add accessors for ICH_ system registers, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 08/23] hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQ, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 23/23] hw/arm/virt: Add board property to enable EL2, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 11/23] hw/arm/virt: Wire VIRQ, VFIQ, maintenance irq lines from GIC to CPU, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 10/23] target-arm: Expose output GPIO line for VCPU maintenance interrupt, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 07/23] hw/arm/virt: Don't incorrectly claim architectural timer to be edge-triggered, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 04/23] hw/arm/virt: add 2.9 machine type,
Peter Maydell <=
- [Qemu-devel] [PATCH 02/23] hw/intc/arm_gicv3: Remove incorrect usage of fieldoffset, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 09/23] hw/intc/arm_gic: Add external IRQ lines for VIRQ and VFIQ, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 05/23] hw/arm/virt: Merge VirtBoardInfo and VirtMachineState, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 03/23] hw/intc/arm_gicv3: Don't signal Pending+Active interrupts to CPU, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 01/23] target-arm: Log AArch64 exception returns, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 06/23] hw/arm/virt: Rename 'vbi' variables to 'vms', Peter Maydell, 2016/12/13