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Re: [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and ena
From: |
Andrew Jones |
Subject: |
Re: [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs |
Date: |
Tue, 13 Dec 2016 22:16:06 +0100 |
User-agent: |
Mutt/1.6.0.1 (2016-04-01) |
On Tue, Dec 13, 2016 at 10:36:01AM +0000, Peter Maydell wrote:
> This patchset adds support for the Virtualization extensions to QEMU's
> GICv3 emulation. This was the last missing piece that was stopping
> us from turning on the EL2 support in the CPU model, so the patchset
> also adds support for enabling it all on the virt board via the
> '-machine virtualization=on' option.
>
> The result works well enough to allow booting a KVM outer guest kernel
> and then running QEMU + an inner guest under KVM inside it. The outer
> guest KVM also passes the kvm-unit-tests GIC tests.
>
I've started some testing with this. When I boot an outer (L1) kernel
with more than one cpu allocated I get
[ 3.441908] CPU: CPUs started in inconsistent modes
[ 3.442787] ------------[ cut here ]------------
[ 3.445434] WARNING: CPU: 0 PID: 1 at arch/arm64/kernel/smp.c:418
smp_cpus_done+0x80/0xa0
...
and KVM does not init. Booting with only one cpu I see we do start in EL2
and KVM does init. I'm booting the L1 kernel through UEFI (AAVMF). Also,
my L1 guest kernel is 4.9 based, but not pure upstream. I can try a more
pure 4.9 kernel with a defconfig later.
Thanks,
drew
- [Qemu-devel] [PATCH 03/23] hw/intc/arm_gicv3: Don't signal Pending+Active interrupts to CPU, (continued)
- [Qemu-devel] [PATCH 03/23] hw/intc/arm_gicv3: Don't signal Pending+Active interrupts to CPU, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 01/23] target-arm: Log AArch64 exception returns, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 06/23] hw/arm/virt: Rename 'vbi' variables to 'vms', Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 18/23] hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IAR, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 12/23] target-arm: Add ARMCPU fields for GIC CPU i/f config, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 22/23] target-arm: Enable EL2 feature bit on A53 and A57, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 20/23] hw/intc/arm_gicv3: Implement EL2 traps for CPU i/f regs, Peter Maydell, 2016/12/13
- Re: [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs,
Andrew Jones <=
- Re: [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs, Andrew Jones, 2016/12/16
- Re: [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs, Alistair Francis, 2016/12/19