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Re: [Qemu-devel] [PATCH v2 11/11] aspeed/smc: handle dummy bytes when do

From: Cédric Le Goater
Subject: Re: [Qemu-devel] [PATCH v2 11/11] aspeed/smc: handle dummy bytes when doing fast reads in command mode
Date: Tue, 17 Jan 2017 09:37:23 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.6.0

On 01/16/2017 07:58 PM, mar.krzeminski wrote:
> W dniu 16.01.2017 o 09:18, Cédric Le Goater pisze:
>>> I did not notice that this function is also called in writes, isn't it?
>>> If yes, dummy cycles are used only during reads so probably CTRL_FREADMODE
>>> needs to be tested.
>> yes. I can take care of that in a follow up patchset for
>> dummy support.
>>   Dummies in user mode is a bit painful to implement, as I had
>> to snoop into the command flow to catch the fast read op.
>> Not sure this is the right approach so I kept it for later.
> Definitelly wrong, controller should not be aware of tha, fix is still on me 
> :(

ok. np. I will send the support for command mode though, 
as this is a must have for booting.

>> Did you have time to take look at the other patches adding
>> Command mode and extending the tests ? I should have addressed
>> your comments there.
> Yes, there is one more thing that could be important. It popped out in 
> Sabrelite
> SPI model. The question is does SCM support different CS active (so device
> is active at CS high). Your code assume that SMC will always use CS LOW to 
> activate
> device. If this is not true you might be interested in update this too.

Aspeed SoC does not let you configure the chip select polarity 
(nor the clock phase ) So it is active low only.



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