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[Qemu-devel] [PATCH 14/18] tcg: introduce new TCGMemOp - MO_128
From: |
Kirill Batuzov |
Subject: |
[Qemu-devel] [PATCH 14/18] tcg: introduce new TCGMemOp - MO_128 |
Date: |
Tue, 17 Jan 2017 12:07:54 +0300 |
Signed-off-by: Kirill Batuzov <address@hidden>
---
tcg/tcg.h | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tcg/tcg.h b/tcg/tcg.h
index cb672f2..f205c6b 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -295,11 +295,12 @@ typedef enum TCGMemOp {
MO_16 = 1,
MO_32 = 2,
MO_64 = 3,
- MO_SIZE = 3, /* Mask for the above. */
+ MO_128 = 4,
+ MO_SIZE = 7, /* Mask for the above. */
- MO_SIGN = 4, /* Sign-extended, otherwise zero-extended. */
+ MO_SIGN = 8, /* Sign-extended, otherwise zero-extended. */
- MO_BSWAP = 8, /* Host reverse endian. */
+ MO_BSWAP = 16, /* Host reverse endian. */
#ifdef HOST_WORDS_BIGENDIAN
MO_LE = MO_BSWAP,
MO_BE = 0,
@@ -331,7 +332,7 @@ typedef enum TCGMemOp {
* - an alignment to a specified size, which may be more or less than
* the access size (MO_ALIGN_x where 'x' is a size in bytes);
*/
- MO_ASHIFT = 4,
+ MO_ASHIFT = 5,
MO_AMASK = 7 << MO_ASHIFT,
#ifdef ALIGNED_ONLY
MO_ALIGN = 0,
--
2.1.4
- [Qemu-devel] [PATCH 09/18] target/arm: use vector opcode to handle vadd.<size> instruction, (continued)
- [Qemu-devel] [PATCH 09/18] target/arm: use vector opcode to handle vadd.<size> instruction, Kirill Batuzov, 2017/01/17
- [Qemu-devel] [PATCH 13/18] tcg: do not relay on exact values of MO_BSWAP or MO_SIGN in backend, Kirill Batuzov, 2017/01/17
- [Qemu-devel] [PATCH 11/18] tcg/i386: support 64-bit vector operations, Kirill Batuzov, 2017/01/17
- [Qemu-devel] [PATCH 10/18] tcg/i386: add support for vector opcodes, Kirill Batuzov, 2017/01/17
- Re: [Qemu-devel] [PATCH 10/18] tcg/i386: add support for vector opcodes, Alex Bennée, 2017/01/27
- [Qemu-devel] [PATCH 12/18] tcg/i386: support remaining vector addition operations, Kirill Batuzov, 2017/01/17
- [Qemu-devel] [PATCH 14/18] tcg: introduce new TCGMemOp - MO_128,
Kirill Batuzov <=
- [Qemu-devel] [PATCH 07/18] tcg: add vector addition operations, Kirill Batuzov, 2017/01/17
- [Qemu-devel] [PATCH 15/18] tcg: introduce qemu_ld_v128 and qemu_st_v128 opcodes, Kirill Batuzov, 2017/01/17
- [Qemu-devel] [PATCH 16/18] softmmu: create helpers for vector loads, Kirill Batuzov, 2017/01/17
- [Qemu-devel] [PATCH 17/18] tcg/i386: add support for qemu_ld_v128/qemu_st_v128 ops, Kirill Batuzov, 2017/01/17
- [Qemu-devel] [PATCH 18/18] target/arm: load two consecutive 64-bits vector regs as a 128-bit vector reg, Kirill Batuzov, 2017/01/17
- Re: [Qemu-devel] [PATCH 00/18] Emulate guest vector operations with host vector operations, Alex Bennée, 2017/01/27