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[Qemu-devel] [PATCH 0/2] Aspeed watchdog controller model

From: Cédric Le Goater
Subject: [Qemu-devel] [PATCH 0/2] Aspeed watchdog controller model
Date: Wed, 18 Jan 2017 17:55:29 +0100


The Aspeed SoC includes a set of watchdog timers using 32-bit
decrement counters. This patchset provides a model for this controller
and adds the first watchdog to the Aspeed SoC model. A second watchdog
exists and is used on real HW to boot from a second flash module
containing a golden image of the firmware. This is not supported yet
in qemu.

The main benefit today of this model is to enables reboot/reset of a
guest from U-Boot and Linux.



Cédric Le Goater (1):
  aspeed: add a watchdog controller

Joel Stanley (1):
  wdt: Add Aspeed watchdog device model

 hw/arm/aspeed_soc.c              |  13 +++
 hw/watchdog/Makefile.objs        |   1 +
 hw/watchdog/wdt_aspeed.c         | 214 +++++++++++++++++++++++++++++++++++++++
 include/hw/arm/aspeed_soc.h      |   2 +
 include/hw/watchdog/wdt_aspeed.h |  37 +++++++
 5 files changed, 267 insertions(+)
 create mode 100644 hw/watchdog/wdt_aspeed.c
 create mode 100644 include/hw/watchdog/wdt_aspeed.h


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