[Qemu-devel] [PATCH v2 0/2] Aspeed watchdog controller model

[Cédric Le Goater]

Hello,

The Aspeed SoC includes a set of watchdog timers using 32-bit
decrement counters. This patchset provides a model for this controller
and adds the first watchdog to the Aspeed SoC model. A second watchdog
exists and is used on real HW to boot from a second flash module
containing a golden image of the firmware. This is not supported yet
in qemu.

The main benefit today of this model is to enables reboot/reset of a
guest from U-Boot and Linux.

Thanks,

C.

Cédric Le Goater (2):
  wdt: Add Aspeed watchdog device model
  aspeed: add a watchdog controller

 hw/arm/aspeed_soc.c              |  13 +++
 hw/watchdog/Makefile.objs        |   1 +
 hw/watchdog/wdt_aspeed.c         | 225 +++++++++++++++++++++++++++++++++++++++
 include/hw/arm/aspeed_soc.h      |   2 +
 include/hw/watchdog/wdt_aspeed.h |  32 ++++++
 5 files changed, 273 insertions(+)
 create mode 100644 hw/watchdog/wdt_aspeed.c
 create mode 100644 include/hw/watchdog/wdt_aspeed.h

-- 
2.7.4