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Re: [Qemu-devel] [PATCH 02/10] armv7m_nvic: keep a pointer to the CPU
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 02/10] armv7m_nvic: keep a pointer to the CPU |
Date: |
Fri, 27 Jan 2017 13:16:04 +0000 |
On 27 January 2017 at 12:41, Alex Bennée <address@hidden> wrote:
>> @@ -349,7 +347,6 @@ static void nvic_writel(nvic_state *s, uint32_t offset,
>> uint32_t value)
>> }
>> break;
>> case 0xd08: /* Vector Table Offset. */
>> - cpu = ARM_CPU(qemu_get_cpu(0));
>> cpu->env.v7m.vecbase = value & 0xffffff80;
>
> Given it is only used once here you could just indirect it:
>
> s->cpu->env.v7m.vecbase = value & 0xffffff80;
Two reasons not to do that:
(1) it makes this patch easier to review if all it's
doing is deleting lines that set cpu
(2) future patches improving the NVIC support are going
to add more cases that want to use the cpu pointer
thanks
-- PMM
- [Qemu-devel] [PATCH 01/10] target/arm: Drop IS_M() macro, (continued)
- [Qemu-devel] [PATCH 01/10] target/arm: Drop IS_M() macro, Peter Maydell, 2017/01/24
- [Qemu-devel] [PATCH 07/10] armv7m: Report no-coprocessor faults correctly, Peter Maydell, 2017/01/24
- [Qemu-devel] [PATCH 09/10] armv7m: FAULTMASK should be 0 on reset, Peter Maydell, 2017/01/24
- [Qemu-devel] [PATCH 10/10] armv7m: R14 should reset to 0xffffffff, Peter Maydell, 2017/01/24
- [Qemu-devel] [PATCH 08/10] armv7m: Honour CCR.USERSETMPEND, Peter Maydell, 2017/01/24
- [Qemu-devel] [PATCH 04/10] armv7m: implement CCR, CFSR, HFSR, DFSR, BFAR, and MMFAR, Peter Maydell, 2017/01/24
- [Qemu-devel] [PATCH 02/10] armv7m_nvic: keep a pointer to the CPU, Peter Maydell, 2017/01/24
- [Qemu-devel] [PATCH 03/10] armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR, Peter Maydell, 2017/01/24
- [Qemu-devel] [PATCH 05/10] armv7m: honour CCR.STACKALIGN on exception entry, Peter Maydell, 2017/01/24
- [Qemu-devel] [PATCH 06/10] armv7m: set CFSR.UNDEFINSTR on undefined instructions, Peter Maydell, 2017/01/24
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