[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 02/16] softloat: disable floatx80_invalid_encodin
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH v2 02/16] softloat: disable floatx80_invalid_encoding() for m68k |
Date: |
Mon, 30 Jan 2017 19:16:20 +0100 |
According to the comment, this definition of invalid encoding is given
by intel developer's manual, and doesn't work with the behavior
of 680x0 FPU.
Signed-off-by: Laurent Vivier <address@hidden>
---
fpu/softfloat.c | 20 ++++++++++++++++++++
include/fpu/softfloat.h | 15 ---------------
2 files changed, 20 insertions(+), 15 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index c295f31..3aa05c1 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -4799,6 +4799,26 @@ int float64_unordered_quiet(float64 a, float64 b,
float_status *status)
}
/*----------------------------------------------------------------------------
+| Return whether the given value is an invalid floatx80 encoding.
+| Invalid floatx80 encodings arise when the integer bit is not set, but
+| the exponent is not zero. The only times the integer bit is permitted to
+| be zero is in subnormal numbers and the value zero.
+| This includes what the Intel software developer's manual calls pseudo-NaNs,
+| pseudo-infinities and un-normal numbers. It does not include
+| pseudo-denormals, which must still be correctly handled as inputs even
+| if they are never generated as outputs.
+*----------------------------------------------------------------------------*/
+static inline bool floatx80_invalid_encoding(floatx80 a)
+{
+#if defined(TARGET_M68K)
+ return 0;
+#else
+ return (a.low & (1ULL << 63)) == 0 && (a.high & 0x7FFF) != 0;
+#endif
+}
+
+
+/*----------------------------------------------------------------------------
| Returns the result of converting the extended double-precision floating-
| point value `a' to the 32-bit two's complement integer format. The
| conversion is performed according to the IEC/IEEE Standard for Binary
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 14f8383..1bde349 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -658,21 +658,6 @@ static inline int floatx80_is_any_nan(floatx80 a)
return ((a.high & 0x7fff) == 0x7fff) && (a.low<<1);
}
-/*----------------------------------------------------------------------------
-| Return whether the given value is an invalid floatx80 encoding.
-| Invalid floatx80 encodings arise when the integer bit is not set, but
-| the exponent is not zero. The only times the integer bit is permitted to
-| be zero is in subnormal numbers and the value zero.
-| This includes what the Intel software developer's manual calls pseudo-NaNs,
-| pseudo-infinities and un-normal numbers. It does not include
-| pseudo-denormals, which must still be correctly handled as inputs even
-| if they are never generated as outputs.
-*----------------------------------------------------------------------------*/
-static inline bool floatx80_invalid_encoding(floatx80 a)
-{
- return (a.low & (1ULL << 63)) == 0 && (a.high & 0x7FFF) != 0;
-}
-
#define floatx80_zero make_floatx80(0x0000, 0x0000000000000000LL)
#define floatx80_one make_floatx80(0x3fff, 0x8000000000000000LL)
#define floatx80_ln2 make_floatx80(0x3ffe, 0xb17217f7d1cf79acLL)
--
2.9.3
- [Qemu-devel] [PATCH v2 00/16] target-m68k: implement 680x0 FPU, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 01/16] softfloat: define 680x0 specific values, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 02/16] softloat: disable floatx80_invalid_encoding() for m68k,
Laurent Vivier <=
- [Qemu-devel] [PATCH v2 04/16] target-m68k: define ext_opsize, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 07/16] target-m68k: manage FPU exceptions, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 03/16] target-m68k: move FPU helpers to fpu_helper.c, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 13/16] target-m68k: add fsglmul and fsgldiv, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 08/16] target-m68k: define 96bit FP registers for gdb on 680x0, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 06/16] target-m68k: add FPCR and FPSR, Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 10/16] target-m68k: add fscc., Laurent Vivier, 2017/01/30
- [Qemu-devel] [PATCH v2 09/16] target-m68k: add fmovem, Laurent Vivier, 2017/01/30