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Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER
From: |
Suraj Jitindar Singh |
Subject: |
Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries tcg |
Date: |
Fri, 10 Feb 2017 16:49:27 +1100 |
On Fri, 2017-02-10 at 16:28 +1100, Suraj Jitindar Singh wrote:
> On Fri, 2017-02-10 at 16:25 +1100, Suraj Jitindar Singh wrote:
> >
> > This is V2 of the patch series to implement tcg emulation support
> > for
> > a
> > POWER9 cpu model for the pseries machine type running a legacy
> > kernel.
> > That is a kernel which doesn't use the new radix mmu mode or the
> > new
> > hash
> > mmu mode with segment tables.
> FWIW tree available here:
> https://gitlab.ozlabs.ibm.com/surajjs/qemu/tree/POWER9-LEGACY
Scratch that, this:
https://github.ibm.com/surajjs/qemu/tree/POWER9-LEGACY
> >
> >
> > To use a POWER9 cpu provide the command line option "-cpu POWER9".
> >
> > This series attempts to avoid precluding KVM-HV support for the
> > POWER9
> > cpu model but doesn't attempt to support KVM-PR or the powernv
> > machine
> > for the POWER9 cpu model as these aren't currently supported or
> > implemented and further code changes will be required in the event
> > these
> > are implemented.
> >
> > This series will be followed shortly by one to implement radix
> > support and
> > currently trying to boot a kernel with support for radix with this
> > series
> > will fail on the H_REGISTER_PROCESS_TABLE hcall.
> >
> > The changes from V1 are as follows:
> >
> > - Drop patches which have already been merged.
> > - Instead of allocating a whole partition table we allocate a
> > single
> > entry in the sPAPRMachineState and access it via the virtual
> > hypv.
> > - Changes to how we handle SDR1 and renaming of associated
> > functions.
> > - Drop patch to use the new pte format, guest kernels expect the
> > old
> > format anyway, so this will only be applicable when POWER9
> > powernv
> > support is added, so delay adding support for this until then.
> > - Rename the mmu fault handler to ppc64_v3_handle_mmu_fault.
> > - Move segment table searching into the fault handler instead of
> > in
> > slb_lookup().
> > - Move adding the POWER9 pseries cpu model to the end of the
> > series.
> >
> > Suraj Jitindar Singh (10):
> > target/ppc/POWER9: Add ISAv3.00 MMU definition
> > target/ppc: Fix LPCR DPFD mask define
> > target/ppc/POWER9: Adapt LPCR handling for POWER9
> > target/ppc/POWER9: Direct all instr and data storage interrupts
> > to
> > the
> > hypv
> > target/ppc: Add patb_entry to sPAPRMachineState
> > target/ppc: Don't use SDR1 when running under a POWER9 cpu model
> > target/ppc/POWER9: Add POWER9 mmu fault handler
> > target/ppc/POWER9: Add POWER9 pa-features definition
> > target/ppc/POWER9: Add cpu_has_work function for POWER9
> > hw/ppc/spapr: Add POWER9 to pseries cpu models
> >
> > hw/ppc/spapr.c | 37 ++++++++++++++++++
> > hw/ppc/spapr_cpu_core.c | 3 ++
> > include/hw/ppc/spapr.h | 1 +
> > target/ppc/cpu-qom.h | 5 ++-
> > target/ppc/cpu.h | 24 +++++++++++-
> > target/ppc/kvm.c | 2 +-
> > target/ppc/machine.c | 4 +-
> > target/ppc/misc_helper.c | 3 +-
> > target/ppc/mmu-hash64.c | 49 +++++++++++++++++++++---
> > target/ppc/mmu-hash64.h | 2 +-
> > target/ppc/mmu.h | 50 +++++++++++++++++++++++++
> > target/ppc/mmu_helper.c | 54 +++++++++++++++++++++++++--
> > target/ppc/translate.c | 7 +++-
> > target/ppc/translate_init.c | 91
> > +++++++++++++++++++++++++++++++++++++++------
> > 14 files changed, 302 insertions(+), 30 deletions(-)
> > create mode 100644 target/ppc/mmu.h
- Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 06/10] target/ppc: Don't use SDR1 when running under a POWER9 cpu model, (continued)
- [Qemu-devel] [QEMU-PPC] [PATCH V2 07/10] target/ppc/POWER9: Add POWER9 mmu fault handler, Suraj Jitindar Singh, 2017/02/10
- [Qemu-devel] [QEMU-PPC] [PATCH V2 08/10] target/ppc/POWER9: Add POWER9 pa-features definition, Suraj Jitindar Singh, 2017/02/10
- [Qemu-devel] [QEMU-PPC] [PATCH V2 09/10] target/ppc/POWER9: Add cpu_has_work function for POWER9, Suraj Jitindar Singh, 2017/02/10
- [Qemu-devel] [QEMU-PPC] [PATCH V2 10/10] hw/ppc/spapr: Add POWER9 to pseries cpu models, Suraj Jitindar Singh, 2017/02/10
- Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries tcg, Suraj Jitindar Singh, 2017/02/10
- Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries tcg,
Suraj Jitindar Singh <=
- Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries tcg, no-reply, 2017/02/10
- Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries tcg, David Gibson, 2017/02/12