[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 08/10] target/ppc/POWER9: Add POWE
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 08/10] target/ppc/POWER9: Add POWER9 pa-features definition |
Date: |
Mon, 13 Feb 2017 15:33:51 +1100 |
User-agent: |
Mutt/1.7.1 (2016-10-04) |
On Fri, Feb 10, 2017 at 04:25:58PM +1100, Suraj Jitindar Singh wrote:
> Add a pa-features definition which includes all of the new fields which
> have been added, note we don't claim support for any of these new features
> at this stage.
>
> Signed-off-by: Suraj Jitindar Singh <address@hidden>
Reviewed-by: David Gibson <address@hidden>
> ---
> hw/ppc/spapr.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 057adae..44eb014 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -356,6 +356,20 @@ static void spapr_populate_pa_features(CPUPPCState *env,
> void *fdt, int offset)
> 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
> 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
> + /* Currently we don't advertise any of the "new" ISAv3.00 functionality
> */
> + uint8_t pa_features_300[] = { 64, 0,
> + 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
> + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
> + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
> + 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 24 - 29 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 - 35 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 36 - 41 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 42 - 47 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48 - 53 */
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 54 - 59 */
> + 0x00, 0x00, 0x00, 0x00 }; /* 60 - 63 */
> +
> uint8_t *pa_features;
> size_t pa_size;
>
> @@ -370,6 +384,10 @@ static void spapr_populate_pa_features(CPUPPCState *env,
> void *fdt, int offset)
> pa_features = pa_features_207;
> pa_size = sizeof(pa_features_207);
> break;
> + case POWERPC_MMU_3_00:
> + pa_features = pa_features_300;
> + pa_size = sizeof(pa_features_300);
> + break;
> default:
> return;
> }
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
- [Qemu-devel] [QEMU-PPC] [PATCH V2 03/10] target/ppc/POWER9: Adapt LPCR handling for POWER9, (continued)
- [Qemu-devel] [QEMU-PPC] [PATCH V2 03/10] target/ppc/POWER9: Adapt LPCR handling for POWER9, Suraj Jitindar Singh, 2017/02/10
- [Qemu-devel] [QEMU-PPC] [PATCH V2 04/10] target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv, Suraj Jitindar Singh, 2017/02/10
- [Qemu-devel] [QEMU-PPC] [PATCH V2 05/10] target/ppc: Add patb_entry to sPAPRMachineState, Suraj Jitindar Singh, 2017/02/10
- [Qemu-devel] [QEMU-PPC] [PATCH V2 06/10] target/ppc: Don't use SDR1 when running under a POWER9 cpu model, Suraj Jitindar Singh, 2017/02/10
- [Qemu-devel] [QEMU-PPC] [PATCH V2 07/10] target/ppc/POWER9: Add POWER9 mmu fault handler, Suraj Jitindar Singh, 2017/02/10
- [Qemu-devel] [QEMU-PPC] [PATCH V2 08/10] target/ppc/POWER9: Add POWER9 pa-features definition, Suraj Jitindar Singh, 2017/02/10
- Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 08/10] target/ppc/POWER9: Add POWER9 pa-features definition,
David Gibson <=
- [Qemu-devel] [QEMU-PPC] [PATCH V2 09/10] target/ppc/POWER9: Add cpu_has_work function for POWER9, Suraj Jitindar Singh, 2017/02/10
- [Qemu-devel] [QEMU-PPC] [PATCH V2 10/10] hw/ppc/spapr: Add POWER9 to pseries cpu models, Suraj Jitindar Singh, 2017/02/10
- Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries tcg, Suraj Jitindar Singh, 2017/02/10
- Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries tcg, no-reply, 2017/02/10
- Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries tcg, David Gibson, 2017/02/12