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Re: [Qemu-devel] [PATCH 5/6] target-ppc: support for 32-bit carry and ov

From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH 5/6] target-ppc: support for 32-bit carry and overflow
Date: Tue, 14 Feb 2017 14:21:36 +1100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0

On 02/14/2017 02:05 PM, Nikunj A Dadhania wrote:
Yes, you are right. I had a discussion with Paul Mackerras yesterday, he
explained to me in detail about the bits. I am working on the revised
implementation. Will detail it in the commit message.

As you're working on this, consider changing the definition of cpu_ov such that the MSB is OV and bit 31 is OV32.


 static inline void gen_op_arith_compute_ov(DisasContext *ctx, TCGv arg0,
                                            TCGv arg1, TCGv arg2, int sub)
     TCGv t0 = tcg_temp_new();

     tcg_gen_xor_tl(cpu_ov, arg0, arg2);
     tcg_gen_xor_tl(t0, arg1, arg2);
     if (sub) {
         tcg_gen_and_tl(cpu_ov, cpu_ov, t0);
     } else {
         tcg_gen_andc_tl(cpu_ov, cpu_ov, t0);
     if (NARROW_MODE(ctx)) {
         tcg_gen_ext32s_tl(cpu_ov, cpu_ov);
-    tcg_gen_shri_tl(cpu_ov, cpu_ov, TARGET_LONG_BITS - 1);
     tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);

is all that is required for arithmetic to compute OV and OV32 into those two 

Obviously more is required for multiplication and division, and you'd also have to change cpu_so to examine the MSB as well.


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