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Re: [Qemu-devel] [PATCH v2 03/13] armv7m: Rewrite NVIC to not use any GI
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v2 03/13] armv7m: Rewrite NVIC to not use any GIC code |
Date: |
Thu, 16 Feb 2017 18:27:15 +0000 |
On 16 February 2017 at 16:35, Peter Maydell <address@hidden> wrote:
> From: Michael Davidsaver <address@hidden>
>
> Despite some superficial similarities of register layout, the
> M-profile NVIC is really very different from the A-profile GIC.
> Our current attempt to reuse the GIC code means that we have
> significant bugs in our NVIC.
>
> Implement the NVIC as an entirely separate device, to give
> us somewhere we can get the behaviour correct.
>
> This initial commit does not attempt to implement exception
> priority escalation, since the GIC-based code didn't either.
> It does fix a few bugs in passing:
> * ICSR.RETTOBASE polarity was wrong and didn't account for
> internal exceptions
> * ICSR.VECTPENDING was 16 too high if the pending exception
> was for an external interrupt
> * UsageFault, BusFault and MemFault were not disabled on reset
> as they are supposed to be
>
> Signed-off-by: Michael Davidsaver <address@hidden>
> [PMM: reworked, various bugs and stylistic cleanups]
> Signed-off-by: Peter Maydell <address@hidden>
> + case 0x400 ... 0x5ef: /* NVIC Priority */
> + startvec = 8 * (offset - 0x400) + NVIC_FIRST_IRQ; /* vector # */
> +
> + for (i = 0; i < size; i++) {
Just noticed this line should be
+ for (i = 0; i < size && startvec + i < s->num_irq; i++) {
which brings it into line with the nvic_sysreg_read() code
and prevents an assert() in set_prio() if the guest writes to
registers beyond the end of the implemented IRQ range.
> + set_prio(s, startvec + i, (value >> (i * 8)) & 0xff);
> + }
> + nvic_irq_update(s);
> + return;
Unless there's some other problem that means I need
to respin anyway I propose to just squash in that fix.
thanks
-- PMM
- [Qemu-devel] [PATCH v2 09/13] armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE, (continued)
- [Qemu-devel] [PATCH v2 09/13] armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE, Peter Maydell, 2017/02/16
- [Qemu-devel] [PATCH v2 11/13] armv7m: Check exception return consistency, Peter Maydell, 2017/02/16
- [Qemu-devel] [PATCH v2 08/13] armv7m: Simpler and faster exception start, Peter Maydell, 2017/02/16
- [Qemu-devel] [PATCH v2 07/13] armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value, Peter Maydell, 2017/02/16
- [Qemu-devel] [PATCH v2 06/13] armv7m: Escalate exceptions to HardFault if necessary, Peter Maydell, 2017/02/16
- [Qemu-devel] [PATCH v2 05/13] arm: gic: Remove references to NVIC, Peter Maydell, 2017/02/16
- [Qemu-devel] [PATCH v2 04/13] armv7m: Fix condition check for taking exceptions, Peter Maydell, 2017/02/16
- [Qemu-devel] [PATCH v2 01/13] armv7m: Rename nvic_state to NVICState, Peter Maydell, 2017/02/16
- [Qemu-devel] [PATCH v2 03/13] armv7m: Rewrite NVIC to not use any GIC code, Peter Maydell, 2017/02/16
- Re: [Qemu-devel] [PATCH v2 03/13] armv7m: Rewrite NVIC to not use any GIC code,
Peter Maydell <=
- Re: [Qemu-devel] [Qemu-arm] [PATCH v2 00/13] Rewrite NVIC to not depend on the GIC, Peter Maydell, 2017/02/16
- Re: [Qemu-devel] [Qemu-arm] [PATCH v2 00/13] Rewrite NVIC to not depend on the GIC, Alex Bennée, 2017/02/24
- Re: [Qemu-devel] [Qemu-arm] [PATCH v2 00/13] Rewrite NVIC to not depend on the GIC, Peter Maydell, 2017/02/24
- Re: [Qemu-devel] [Qemu-arm] [PATCH v2 00/13] Rewrite NVIC to not depend on the GIC, Peter Maydell, 2017/02/24
- Re: [Qemu-devel] [Qemu-arm] [PATCH v2 00/13] Rewrite NVIC to not depend on the GIC, Alex Bennée, 2017/02/24
- Re: [Qemu-devel] [Qemu-arm] [PATCH v2 00/13] Rewrite NVIC to not depend on the GIC, Peter Maydell, 2017/02/24
- Re: [Qemu-devel] [Qemu-arm] [PATCH v2 00/13] Rewrite NVIC to not depend on the GIC, Alex Bennée, 2017/02/24
- Re: [Qemu-devel] [Qemu-arm] [PATCH v2 00/13] Rewrite NVIC to not depend on the GIC, Peter Maydell, 2017/02/24
- Re: [Qemu-devel] [Qemu-arm] [PATCH v2 00/13] Rewrite NVIC to not depend on the GIC, Alex Bennée, 2017/02/24