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Re: [Qemu-devel] [Qemu-ppc] [QEMU-PPC] [PATCH V3 02/10] target/ppc: Fix

From: Balbir Singh
Subject: Re: [Qemu-devel] [Qemu-ppc] [QEMU-PPC] [PATCH V3 02/10] target/ppc: Fix LPCR DPFD mask define
Date: Mon, 20 Feb 2017 16:47:56 +1100
User-agent: Mutt/1.7.1 (2016-10-04)

On Mon, Feb 20, 2017 at 03:04:30PM +1100, Suraj Jitindar Singh wrote:
> The DPFD field in the LPCR is 3 bits wide. This has always been defined
> as 0x3 << shift which indicates a 2 bit field, which is incorrect.
> Correct this.
> Signed-off-by: Suraj Jitindar Singh <address@hidden>
> ---

Acked-by: Balbir Singh <address@hidden>

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