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Re: [Qemu-devel] [QEMU-PPC] [PATCH V3 04/10] target/ppc/POWER9: Direct a

From: Balbir Singh
Subject: Re: [Qemu-devel] [QEMU-PPC] [PATCH V3 04/10] target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv
Date: Tue, 21 Feb 2017 15:22:05 +1100
User-agent: Mutt/1.7.1 (2016-10-04)

On Mon, Feb 20, 2017 at 03:04:32PM +1100, Suraj Jitindar Singh wrote:
> The vpm0 bit was removed from the LPCR in POWER9, this bit controlled
> whether ISI and DSI interrupts were directed to the hypervisor or the
> partition. These interrupts now go to the hypervisor irrespective, thus
> it is no longer necessary to check the vmp0 bit in the LPCR.
> Signed-off-by: Suraj Jitindar Singh <address@hidden>
> Reviewed-by: David Gibson <address@hidden>
> ---

Acked-by: Balbir Singh <address@hidden>

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