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Re: [Qemu-devel] [PATCH 09/10] sm501: Add some more missing registers

From: BALATON Zoltan
Subject: Re: [Qemu-devel] [PATCH 09/10] sm501: Add some more missing registers
Date: Fri, 24 Feb 2017 22:49:04 +0100 (CET)
User-agent: Alpine 2.20 (BSF 67 2015-01-07)

On Fri, 24 Feb 2017, BALATON Zoltan wrote:
On Fri, 24 Feb 2017, Peter Maydell wrote:
On 19 February 2017 at 16:35, BALATON Zoltan <address@hidden> wrote:
Write only to allow clients to initialise these without failing

Signed-off-by: BALATON Zoltan <address@hidden>

What's the point in write-only register values?

U-boot writes this register during setting up the device and without this it would abort QEMU.

What does the real hardware do here?

This register contains bits to set up FIFO parameters and memory priorities which we are not emulating so these can be ignored here but the hardware would change parameters according the value written.

Sorry, this is for the arbitration_control register. The other registers added in this patch are for the 2D engine which is only partially emulated but writing the registers is OK as long as no operation using them is called. (That case is handled in sm501_2d_operation.) We need to allow writes as these are initialised during boot but not used afterwards. Later when implementing more of the 2D engine we may use the written values.

If the registers are writes-ignored, there's no need to store
the data written into the state struct; if the registers are
reads-as-written then implement them that way.

Still not sure what do you mean by read-as-written because I think that's exactly what is done here, value stored and read back as is, except for video_control where there are reserved bits that are always 0.

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