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[Qemu-devel] [PULL 07/30] hw/arm/virt: fix cpu object reference leak
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 07/30] hw/arm/virt: fix cpu object reference leak |
Date: |
Mon, 27 Feb 2017 18:04:36 +0000 |
From: Igor Mammedov <address@hidden>
object_new(FOO) returns an object with ref_cnt == 1
and following
object_property_set_bool(cpuobj, true, "realized", NULL)
set parent of cpuobj to '/machine/unattached' which makes
ref_cnt == 2.
Since machvirt_init() doesn't take ownership of cpuobj
returned by object_new() it should explicitly drop
reference to cpuobj when dangling pointer is about to
go out of scope like it's done pc_new_cpu() to avoid
object leak.
Signed-off-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index f3440f2..0c270b8 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1378,6 +1378,7 @@ static void machvirt_init(MachineState *machine)
}
object_property_set_bool(cpuobj, true, "realized", NULL);
+ object_unref(cpuobj);
}
fdt_add_timer_nodes(vms);
fdt_add_cpu_nodes(vms);
--
2.7.4
- [Qemu-devel] [PULL 24/30] armv7m: Allow SHCSR writes to change pending and active bits, (continued)
- [Qemu-devel] [PULL 24/30] armv7m: Allow SHCSR writes to change pending and active bits, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 17/30] armv7m: Escalate exceptions to HardFault if necessary, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 15/30] armv7m: Fix condition check for taking exceptions, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 22/30] armv7m: Check exception return consistency, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 26/30] hw/sd: add card-reparenting function, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 16/30] arm: gic: Remove references to NVIC, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 01/30] target-arm: Implement BCM2835 hardware RNG, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 10/30] hw/arm/virt: Add a user option to disallow ITS instantiation, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 08/30] Add missing fp_access_check() to aarch64 crypto instructions, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 23/30] armv7m: Raise correct kind of UsageFault for attempts to execute ARM code, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 07/30] hw/arm/virt: fix cpu object reference leak,
Peter Maydell <=
- [Qemu-devel] [PULL 25/30] bcm2835_sdhost: add bcm2835 sdhost controller, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 05/30] sd: sdhci: conditionally invoke multi block transfer, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 30/30] hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 02/30] bcm2835_rng: Use qcrypto_random_bytes() rather than rand(), Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 06/30] sd: sdhci: Remove block count enable check in single block transfers, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 13/30] armv7m: Implement reading and writing of PRIGROUP, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 11/30] ARM i.MX timers: fix reset handling, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 27/30] bcm2835_gpio: add bcm2835 gpio controller, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 04/30] sd: sdhci: check transfer mode register in multi block transfer, Peter Maydell, 2017/02/27
- [Qemu-devel] [PULL 03/30] sd: sdhci: mask transfer mode register value, Peter Maydell, 2017/02/27