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[Qemu-devel] [PULL 06/50] sysemu: support up to 1024 vCPUs
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 06/50] sysemu: support up to 1024 vCPUs |
Date: |
Wed, 1 Mar 2017 15:43:21 +1100 |
From: Greg Kurz <address@hidden>
Some systems can already provide more than 255 hardware threads.
Bumping the QEMU limit to 1024 seems reasonable:
- it has no visible overhead in top;
- the limit itself has no effect on hot paths.
Cc: Greg Kurz <address@hidden>
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 87d8366..0b57aad 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2891,7 +2891,7 @@ static void spapr_machine_class_init(ObjectClass *oc,
void *data)
mc->init = ppc_spapr_init;
mc->reset = ppc_spapr_reset;
mc->block_default_type = IF_SCSI;
- mc->max_cpus = 255;
+ mc->max_cpus = 1024;
mc->no_parallel = 1;
mc->default_boot_order = "";
mc->default_ram_size = 512 * M_BYTE;
--
2.9.3
- [Qemu-devel] [PULL 02/50] target/ppc: optimize gen_write_xer(), (continued)
- [Qemu-devel] [PULL 02/50] target/ppc: optimize gen_write_xer(), David Gibson, 2017/02/28
- [Qemu-devel] [PULL 18/50] target/ppc: update ca32 in arithmetic substract, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 17/50] target/ppc: update ca32 in arithmetic add, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 10/50] target/ppc: SDR1 is a hypervisor resource, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 09/50] target/ppc: Merge cpu_ppc_set_vhyp() with cpu_ppc_set_papr(), David Gibson, 2017/02/28
- [Qemu-devel] [PULL 03/50] PCI: add missing classes in pci_ids.h to build device tree, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 07/50] target/ppc: Fix KVM-HV HPTE accessors, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 08/50] pseries: Minor cleanups to HPT management hypercalls, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 16/50] target/ppc: support for 32-bit carry and overflow, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 23/50] target/ppc: add mcrxrx instruction, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 06/50] sysemu: support up to 1024 vCPUs,
David Gibson <=
- [Qemu-devel] [PULL 20/50] target/ppc: use tcg ops for neg instruction, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 14/50] target/ppc: Remove the function ppc_hash64_set_sdr1(), David Gibson, 2017/02/28
- [Qemu-devel] [PULL 11/50] target/ppc: Cleanup HPTE accessors for 64-bit hash MMU, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 15/50] target/ppc: Correct SDR1 masking, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 19/50] target/ppc: update overflow flags for add/sub, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 32/50] ppc/xics: use the QOM interface to get irqs, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 34/50] ppc/xics: remove xics_find_source(), David Gibson, 2017/02/28
- [Qemu-devel] [PULL 30/50] ppc/xics: introduce a XICSFabric QOM interface to handle ICSs, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 24/50] spapr/pci: populate PCI DT in reverse order, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 25/50] xics: XICS should not be a SysBusDevice, David Gibson, 2017/02/28