[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 21/50] target/ppc: add ov32 flag for multiply low ins
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 21/50] target/ppc: add ov32 flag for multiply low insns |
Date: |
Wed, 1 Mar 2017 15:43:36 +1100 |
From: Nikunj A Dadhania <address@hidden>
For Multiply Word:
SO, OV, and OV32 bits reflects overflow of the 32-bit result
For Multiply DoubleWord:
SO, OV, and OV32 bits reflects overflow of the 64-bit result
Signed-off-by: Nikunj A Dadhania <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/translate.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index d4d9941..ccf3bff 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1285,6 +1285,9 @@ static void gen_mullwo(DisasContext *ctx)
tcg_gen_sari_i32(t0, t0, 31);
tcg_gen_setcond_i32(TCG_COND_NE, t0, t0, t1);
tcg_gen_extu_i32_tl(cpu_ov, t0);
+ if (is_isa300(ctx)) {
+ tcg_gen_mov_tl(cpu_ov32, cpu_ov);
+ }
tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
tcg_temp_free_i32(t0);
@@ -1346,6 +1349,9 @@ static void gen_mulldo(DisasContext *ctx)
tcg_gen_sari_i64(t0, t0, 63);
tcg_gen_setcond_i64(TCG_COND_NE, cpu_ov, t0, t1);
+ if (is_isa300(ctx)) {
+ tcg_gen_mov_tl(cpu_ov32, cpu_ov);
+ }
tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
tcg_temp_free_i64(t0);
--
2.9.3
- [Qemu-devel] [PULL 14/50] target/ppc: Remove the function ppc_hash64_set_sdr1(), (continued)
- [Qemu-devel] [PULL 14/50] target/ppc: Remove the function ppc_hash64_set_sdr1(), David Gibson, 2017/02/28
- [Qemu-devel] [PULL 11/50] target/ppc: Cleanup HPTE accessors for 64-bit hash MMU, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 15/50] target/ppc: Correct SDR1 masking, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 19/50] target/ppc: update overflow flags for add/sub, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 32/50] ppc/xics: use the QOM interface to get irqs, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 34/50] ppc/xics: remove xics_find_source(), David Gibson, 2017/02/28
- [Qemu-devel] [PULL 30/50] ppc/xics: introduce a XICSFabric QOM interface to handle ICSs, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 24/50] spapr/pci: populate PCI DT in reverse order, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 25/50] xics: XICS should not be a SysBusDevice, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 33/50] ppc/xics: use the QOM interface to resend irqs, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 21/50] target/ppc: add ov32 flag for multiply low insns,
David Gibson <=
- [Qemu-devel] [PULL 13/50] target/ppc: Manage external HPT via virtual hypervisor, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 12/50] target/ppc: Eliminate htab_base and htab_mask variables, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 29/50] ppc/xics: add an InterruptStatsProvider interface to ICS and ICP objects, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 22/50] target/ppc: add ov32 flag in divide operations, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 38/50] ppc/xics: move kernel_xics_fd out of KVMXICSState, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 26/50] ppc/xics: remove set_nr_irqs() handler from XICSStateClass, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 40/50] ppc/xics: move the cpu_setup() handler under the ICPState class, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 43/50] ppc/xics: register the reset handler of ICP objects, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 35/50] ppc/xics: register the reset handler of ICS objects, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 39/50] ppc/xics: simplify the cpu_setup() handler, David Gibson, 2017/02/28