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[Qemu-devel] [PULL 22/50] target/ppc: add ov32 flag in divide operations
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 22/50] target/ppc: add ov32 flag in divide operations |
Date: |
Wed, 1 Mar 2017 15:43:37 +1100 |
From: Nikunj A Dadhania <address@hidden>
Add helper_div_compute_ov() in the int_helper for updating the overflow
flags.
For Divide Word:
SO, OV, and OV32 bits reflects overflow of the 32-bit result
For Divide DoubleWord:
SO, OV, and OV32 bits reflects overflow of the 64-bit result
Signed-off-by: Nikunj A Dadhania <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/translate.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index ccf3bff..982e66f 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1021,6 +1021,9 @@ static inline void gen_op_arith_divw(DisasContext *ctx,
TCGv ret, TCGv arg1,
}
if (compute_ov) {
tcg_gen_extu_i32_tl(cpu_ov, t2);
+ if (is_isa300(ctx)) {
+ tcg_gen_extu_i32_tl(cpu_ov32, t2);
+ }
tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
}
tcg_temp_free_i32(t0);
@@ -1092,6 +1095,9 @@ static inline void gen_op_arith_divd(DisasContext *ctx,
TCGv ret, TCGv arg1,
}
if (compute_ov) {
tcg_gen_mov_tl(cpu_ov, t2);
+ if (is_isa300(ctx)) {
+ tcg_gen_mov_tl(cpu_ov32, t2);
+ }
tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
}
tcg_temp_free_i64(t0);
@@ -1110,10 +1116,10 @@ static void glue(gen_, name)(DisasContext *ctx)
cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \
sign, compute_ov); \
}
-/* divwu divwu. divwuo divwuo. */
+/* divdu divdu. divduo divduo. */
GEN_INT_ARITH_DIVD(divdu, 0x0E, 0, 0);
GEN_INT_ARITH_DIVD(divduo, 0x1E, 0, 1);
-/* divw divw. divwo divwo. */
+/* divd divd. divdo divdo. */
GEN_INT_ARITH_DIVD(divd, 0x0F, 1, 0);
GEN_INT_ARITH_DIVD(divdo, 0x1F, 1, 1);
--
2.9.3
- [Qemu-devel] [PULL 32/50] ppc/xics: use the QOM interface to get irqs, (continued)
- [Qemu-devel] [PULL 32/50] ppc/xics: use the QOM interface to get irqs, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 34/50] ppc/xics: remove xics_find_source(), David Gibson, 2017/02/28
- [Qemu-devel] [PULL 30/50] ppc/xics: introduce a XICSFabric QOM interface to handle ICSs, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 24/50] spapr/pci: populate PCI DT in reverse order, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 25/50] xics: XICS should not be a SysBusDevice, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 33/50] ppc/xics: use the QOM interface to resend irqs, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 21/50] target/ppc: add ov32 flag for multiply low insns, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 13/50] target/ppc: Manage external HPT via virtual hypervisor, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 12/50] target/ppc: Eliminate htab_base and htab_mask variables, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 29/50] ppc/xics: add an InterruptStatsProvider interface to ICS and ICP objects, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 22/50] target/ppc: add ov32 flag in divide operations,
David Gibson <=
- [Qemu-devel] [PULL 38/50] ppc/xics: move kernel_xics_fd out of KVMXICSState, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 26/50] ppc/xics: remove set_nr_irqs() handler from XICSStateClass, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 40/50] ppc/xics: move the cpu_setup() handler under the ICPState class, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 43/50] ppc/xics: register the reset handler of ICP objects, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 35/50] ppc/xics: register the reset handler of ICS objects, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 39/50] ppc/xics: simplify the cpu_setup() handler, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 49/50] ppc/xics: rename 'ICPState *' variables to 'icp', David Gibson, 2017/02/28
- [Qemu-devel] [PULL 45/50] ppc/xics: export the XICS init routines, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 28/50] ppc/xics: store the ICS object under the sPAPR machine, David Gibson, 2017/02/28
- [Qemu-devel] [PULL 36/50] ppc/xics: remove the XICS list of ICS, David Gibson, 2017/02/28